projects
/
yosys.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
a5f0cb4
)
cxxrtl: fix rzext().
author
whitequark
<whitequark@whitequark.org>
Sat, 13 Jun 2020 00:49:44 +0000
(
00:49
+0000)
committer
whitequark
<whitequark@whitequark.org>
Sat, 13 Jun 2020 00:49:44 +0000
(
00:49
+0000)
This was a correctness issue, but one of the consequences is that it
resulted in jumps in generated machine code where there should have
been none. As a side effect of fixing the bug, Minerva SoC became 10%
faster.
backends/cxxrtl/cxxrtl.h
patch
|
blob
|
history
diff --git
a/backends/cxxrtl/cxxrtl.h
b/backends/cxxrtl/cxxrtl.h
index ce21cc1e6502ab1d797b432d4f3c5a6d533fadd6..10184bb3f7ca999983157892b0d6d5b52e823e68 100644
(file)
--- a/
backends/cxxrtl/cxxrtl.h
+++ b/
backends/cxxrtl/cxxrtl.h
@@
-165,8
+165,8
@@
struct value : public expr_base<value<Bits>> {
carry = (shift_bits == 0) ? 0
: data[n] >> (chunk::bits - shift_bits);
}
- if (
carry != 0
)
- result.data[
result.chunks - 1
] = carry;
+ if (
shift_chunks + chunks < result.chunks
)
+ result.data[
shift_chunks + chunks
] = carry;
return result;
}