* Functions related to anv_batch_bo
*-----------------------------------------------------------------------*/
-static inline struct anv_batch_bo *
+static struct anv_batch_bo *
anv_cmd_buffer_current_batch_bo(struct anv_cmd_buffer *cmd_buffer)
{
return LIST_ENTRY(struct anv_batch_bo, cmd_buffer->batch_bos.prev, link);
}
}
-static inline VkResult
+static VkResult
anv_cmd_buffer_add_seen_bbos(struct anv_cmd_buffer *cmd_buffer,
struct list_head *list)
{
/**
* Returns the greatest common divisor of a and b that is a power of two.
*/
-static inline uint64_t
+static uint64_t
gcd_pow2_u64(uint64_t a, uint64_t b)
{
assert(a > 0 || b > 0);
#include "genxml/genX_pack.h"
#if GEN_GEN == 7 && !GEN_IS_HASWELL
-static inline int64_t
+static int64_t
clamp_int64(int64_t x, int64_t min, int64_t max)
{
if (x < min)
}
}
-static inline bool
+static bool
want_depth_pma_fix(struct anv_cmd_buffer *cmd_buffer)
{
assert(GEN_GEN == 8);
wm_prog_data->computed_depth_mode != PSCDEPTH_OFF;
}
-static inline bool
+static bool
want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer)
{
assert(GEN_GEN == 9);
/**
* Returns the greatest common divisor of a and b that is a power of two.
*/
-static inline uint64_t
+static uint64_t
gcd_pow2_u64(uint64_t a, uint64_t b)
{
assert(a > 0 || b > 0);
}
}
-static inline void
+static void
emit_urb_setup(struct anv_pipeline *pipeline)
{
unsigned entry_size[4];
}
}
-static inline uint32_t
+static uint32_t
get_sampler_count(const struct anv_shader_bin *bin)
{
return DIV_ROUND_UP(bin->bind_map.sampler_count, 4);
}
-static inline uint32_t
+static uint32_t
get_binding_table_entry_count(const struct anv_shader_bin *bin)
{
return DIV_ROUND_UP(bin->bind_map.surface_count, 32);
}
-static inline struct anv_address
+static struct anv_address
get_scratch_address(struct anv_pipeline *pipeline,
gl_shader_stage stage,
const struct anv_shader_bin *bin)
};
}
-static inline uint32_t
+static uint32_t
get_scratch_space(const struct anv_shader_bin *bin)
{
return ffs(bin->prog_data->total_scratch / 2048);
}
-static inline uint32_t
+static uint32_t
get_urb_output_offset()
{
/* Skip the VUE header and position slots */
return 1;
}
-static inline uint32_t
+static uint32_t
get_urb_output_length(const struct anv_shader_bin *bin)
{
const struct brw_vue_prog_data *prog_data =
}
}
-static inline bool
+static bool
has_color_buffer_write_enabled(const struct anv_pipeline *pipeline)
{
const struct anv_shader_bin *shader_bin =
}
}
-static inline bool
+static bool
is_dual_src_blend_factor(VkBlendFactor factor)
{
return factor == VK_BLEND_FACTOR_SRC1_COLOR ||
#if GEN_GEN > 7 || GEN_IS_HASWELL
-static inline uint32_t
+static uint32_t
mi_alu(uint32_t opcode, uint32_t operand1, uint32_t operand2)
{
struct GENX(MI_MATH_ALU_INSTRUCTION) instr = {
return anv_device_submit_simple_batch(device, &batch);
}
-static inline uint32_t
+static uint32_t
vk_to_gen_tex_filter(VkFilter filter, bool anisotropyEnable)
{
switch (filter) {
}
}
-static inline uint32_t
+static uint32_t
vk_to_gen_max_anisotropy(float ratio)
{
return (anv_clamp_f(ratio, 2, 16) - 2) / 2;