+2002-05-13 Andrew Cagney <ac131313@redhat.com>
+
+ * config/m88k/tm-m88k.h: Update copyright.
+ (m88k_target_write_pc): Declare
+ (TARGET_WRITE_PC): Redefine using m88k_target_write_pc.
+ (M88K_NNPC_REGNUM): Rename NNPC_REGNUM.
+ (SHIFT_INST_REGS): Update definition.
+ * m88k-tdep.c (m88k_target_write_pc): New function. Implement
+ using old definition of TARGET_WRITE_PC.
+ * regcache.c (generic_target_write_pc): Delete code handling
+ NNPC_REGNUM.
+ * gdbarch.sh (NNPC_REGNUM): Delete.
+ * gdbarch.h, gdbarch.c: Regenerate.
+
2002-05-13 Richard Earnshaw <rearnsha@arm.com>
* builtin-regs.c (value_of_builtin_reg): Correctly calculate the
/* Target machine description for generic Motorola 88000, for GDB.
- Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1994, 1996, 1998,
- 1999, 2000
- Free Software Foundation, Inc.
+
+ Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1994, 1996,
+ 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
This file is part of GDB.
#define PC_REGNUM SXIP_REGNUM /* Program Counter */
#define NPC_REGNUM SNIP_REGNUM /* Next Program Counter */
-#define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
+#define M88K_NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
+
#define PSR_REGNUM 32 /* Processor Status Register */
#define FPSR_REGNUM 33 /* Floating Point Status Register */
CORE_ADDR npc = read_register (NPC_REGNUM); \
if (pc != npc) \
{ \
- write_register (NNPC_REGNUM, npc); \
+ write_register (M88K_NNPC_REGNUM, npc); \
write_register (NPC_REGNUM, pc); \
} \
}
-- Kevin Buettner
*/
-#define TARGET_WRITE_PC(val, pid) { \
- write_register_pid(SXIP_REGNUM, (long) val, pid); \
- write_register_pid(SNIP_REGNUM, (long) val | 2, pid); \
- write_register_pid(SFIP_REGNUM, ((long) val | 2) + 4, pid); \
-}
+extern void m88k_target_write_pc (CORE_ADDR pc, ptid_t ptid);
+#define TARGET_WRITE_PC(VAL, PID) m88k_target_write_pc (VAL, PID)
+2002-05-13 Andrew Cagney <ac131313@redhat.com>
+
+ * gdbint.texinfo (Target Architecture Definition): Delete
+ documentation on NNPC_REGNUM.
+
2002-05-11 Andrew Cagney <ac131313@redhat.com>
* gdbint.texinfo (Target Architecture Definition): Document
@findex NPC_REGNUM
The number of the ``next program counter'' register, if defined.
-@item NNPC_REGNUM
-@findex NNPC_REGNUM
-The number of the ``next next program counter'' register, if defined.
-Currently, this is only defined for the Motorola 88K.
-
@item PARM_BOUNDARY
@findex PARM_BOUNDARY
If non-zero, round arguments to a boundary of this many bits before
int ps_regnum;
int fp0_regnum;
int npc_regnum;
- int nnpc_regnum;
gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum;
gdbarch_ecoff_reg_to_regnum_ftype *ecoff_reg_to_regnum;
gdbarch_dwarf_reg_to_regnum_ftype *dwarf_reg_to_regnum;
0,
0,
0,
- 0,
generic_register_size,
0,
generic_register_size,
current_gdbarch->ps_regnum = -1;
current_gdbarch->fp0_regnum = -1;
current_gdbarch->npc_regnum = -1;
- current_gdbarch->nnpc_regnum = -1;
current_gdbarch->stab_reg_to_regnum = no_op_reg_to_regnum;
current_gdbarch->ecoff_reg_to_regnum = no_op_reg_to_regnum;
current_gdbarch->dwarf_reg_to_regnum = no_op_reg_to_regnum;
/* Skip verify of ps_regnum, invalid_p == 0 */
/* Skip verify of fp0_regnum, invalid_p == 0 */
/* Skip verify of npc_regnum, invalid_p == 0 */
- /* Skip verify of nnpc_regnum, invalid_p == 0 */
/* Skip verify of stab_reg_to_regnum, invalid_p == 0 */
/* Skip verify of ecoff_reg_to_regnum, invalid_p == 0 */
/* Skip verify of dwarf_reg_to_regnum, invalid_p == 0 */
(long) current_gdbarch->memory_remove_breakpoint
/*MEMORY_REMOVE_BREAKPOINT ()*/);
#endif
-#ifdef NNPC_REGNUM
- fprintf_unfiltered (file,
- "gdbarch_dump: NNPC_REGNUM # %s\n",
- XSTRING (NNPC_REGNUM));
- fprintf_unfiltered (file,
- "gdbarch_dump: NNPC_REGNUM = %d\n",
- NNPC_REGNUM);
-#endif
#ifdef NPC_REGNUM
fprintf_unfiltered (file,
"gdbarch_dump: NPC_REGNUM # %s\n",
gdbarch->npc_regnum = npc_regnum;
}
-int
-gdbarch_nnpc_regnum (struct gdbarch *gdbarch)
-{
- gdb_assert (gdbarch != NULL);
- /* Skip verify of nnpc_regnum, invalid_p == 0 */
- if (gdbarch_debug >= 2)
- fprintf_unfiltered (gdb_stdlog, "gdbarch_nnpc_regnum called\n");
- return gdbarch->nnpc_regnum;
-}
-
-void
-set_gdbarch_nnpc_regnum (struct gdbarch *gdbarch,
- int nnpc_regnum)
-{
- gdbarch->nnpc_regnum = nnpc_regnum;
-}
-
int
gdbarch_stab_reg_to_regnum (struct gdbarch *gdbarch, int stab_regnr)
{
#endif
#endif
-/* Default (value) for non- multi-arch platforms. */
-#if (!GDB_MULTI_ARCH) && !defined (NNPC_REGNUM)
-#define NNPC_REGNUM (-1)
-#endif
-
-extern int gdbarch_nnpc_regnum (struct gdbarch *gdbarch);
-extern void set_gdbarch_nnpc_regnum (struct gdbarch *gdbarch, int nnpc_regnum);
-#if (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL) && defined (NNPC_REGNUM)
-#error "Non multi-arch definition of NNPC_REGNUM"
-#endif
-#if GDB_MULTI_ARCH
-#if (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL) || !defined (NNPC_REGNUM)
-#define NNPC_REGNUM (gdbarch_nnpc_regnum (current_gdbarch))
-#endif
-#endif
-
/* Convert stab register number (from `r' declaration) to a gdb REGNUM. */
/* Default (function) for non- multi-arch platforms. */
v:2:PS_REGNUM:int:ps_regnum::::-1:-1::0
v:2:FP0_REGNUM:int:fp0_regnum::::0:-1::0
v:2:NPC_REGNUM:int:npc_regnum::::0:-1::0
-v:2:NNPC_REGNUM:int:nnpc_regnum::::0:-1::0
# Convert stab register number (from \`r\' declaration) to a gdb REGNUM.
f:2:STAB_REG_TO_REGNUM:int:stab_reg_to_regnum:int stab_regnr:stab_regnr:::no_op_reg_to_regnum::0
# Provide a default mapping from a ecoff register number to a gdb REGNUM.
/* Target-machine dependent code for Motorola 88000 series, for GDB.
- Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 2000,
- 2001 Free Software Foundation, Inc.
+
+ Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
+ 2000, 2001, 2002 Free Software Foundation, Inc.
This file is part of GDB.
int target_is_m88110 = 0;
+void
+m88k_target_write_pc (CORE_ADDR pc, ptid_t ptid)
+{
+ /* According to the MC88100 RISC Microprocessor User's Manual,
+ section 6.4.3.1.2:
+
+ ... can be made to return to a particular instruction by placing
+ a valid instruction address in the SNIP and the next sequential
+ instruction address in the SFIP (with V bits set and E bits
+ clear). The rte resumes execution at the instruction pointed to
+ by the SNIP, then the SFIP.
+
+ The E bit is the least significant bit (bit 0). The V (valid)
+ bit is bit 1. This is why we logical or 2 into the values we are
+ writing below. It turns out that SXIP plays no role when
+ returning from an exception so nothing special has to be done
+ with it. We could even (presumably) give it a totally bogus
+ value.
+
+ -- Kevin Buettner */
+
+ write_register_pid (SXIP_REGNUM, pc, ptid);
+ write_register_pid (SNIP_REGNUM, (pc | 2), ptid);
+ write_register_pid (SFIP_REGNUM, (pc | 2) + 4, ptid);
+}
+
/* The type of a register. */
struct type *
m88k_register_type (int regnum)
write_register_pid (PC_REGNUM, pc, ptid);
if (NPC_REGNUM >= 0)
write_register_pid (NPC_REGNUM, pc + 4, ptid);
- if (NNPC_REGNUM >= 0)
- write_register_pid (NNPC_REGNUM, pc + 8, ptid);
#else
internal_error (__FILE__, __LINE__,
"generic_target_write_pc");
projects / binutils-gdb.git / commitdiff