offs_rd(o_rd), offs_rs1(o_rs1), offs_rs2(o_rs2), offs_rs3(o_rs3),
offs_imm(o_imm),
prd(p_rd), prs1(p_rs1), prs2(p_rs2), prs3(p_rs3) {}
+
uint64_t _rvc_spoffs_imm(uint64_t elwidth, uint64_t baseoffs);
uint64_t rvc_lwsp_imm() { return _rvc_spoffs_imm(4, insn_t::rvc_lwsp_imm()); }
uint64_t rvc_ldsp_imm() { return _rvc_spoffs_imm(8, insn_t::rvc_ldsp_imm()); }
uint64_t rvc_swsp_imm() { return _rvc_spoffs_imm(4, insn_t::rvc_swsp_imm()); }
uint64_t rvc_sdsp_imm() { return _rvc_spoffs_imm(8, insn_t::rvc_sdsp_imm()); }
+
uint64_t rd () { return predicated(_rd (), *offs_rd, prd); }
uint64_t rs1() { return predicated(_rs1(), *offs_rs1, prs1); }
uint64_t rs2() { return predicated(_rs2(), *offs_rs2, prs2); }
uint64_t _rvc_rs2s() { return _remap(insn_t::rvc_rs2s(), fimap & REG_RVC_RS2S,
offs_rs2); }
+ // used for predicated branches. sets bit N if val=true; clears bit N if false
+ uint64_t rd_bitset(uint64_t bit, bool val);
+
bool sv_check_reg(bool intreg, uint64_t reg);
sv_reg_entry* get_regentry(uint64_t reg, bool isint);
sv_pred_entry* get_predentry(uint64_t reg, bool isint);