# Bit ordering.
-IBM chose MSB0 for the OpenPOWER v3.0B specification. This makes things slightly hair-raising and the relationship between the CR and the CR Field
-numbers is not clearly defined. To make it clear we define a new
-term, `CR{n}`.
-`CR{n}` refers to `CR0` when `n=0` and consequently, for CR0-7, is defined, in v3.0B pseudocode, as:
-
- CR{7-n} = CR[32+n*4:35+n*4]
-
-Also note that for SVP64 the relationship for the sequential
-numbering of elements is to the CR **fields** within
-the CR Register, not to individual bits within the CR register.
+Please see [[svp64/appendix]] regarding CR bit ordering and for
+the definition of `CR{n}`
# Instruction form and pseudocode