system-arm: Enabled HDLcd by default in DTS
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 4 Jan 2021 13:48:48 +0000 (13:48 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 26 Jan 2021 14:58:44 +0000 (14:58 +0000)
This is fine as people using *_hdlcd.dtsi are willing to simulate
an HDLcd

JIRA: https://gem5.atlassian.net/browse/GEM5-866

Change-Id: Ifd5d6ecc81de920dbc29a05b07f30c13dcee3aa4
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/38797
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
system/arm/dt/platforms/display.dtsi
system/arm/dt/platforms/vexpress_gem5_v1_hdlcd.dtsi
system/arm/dt/platforms/vexpress_gem5_v2_hdlcd.dtsi

index 16a029a464eb7430058f4dad3866506908c16c4f..64c41e6c050ebb8ac940ef3fec12e714552f8be2 100644 (file)
@@ -55,8 +55,6 @@
 };
 
 &dp0 {
-       status = "ok";
-
        port {
                dp0_output: endpoint@0 {
                        remote-endpoint = <&dp0_virt_input>;
index efca66db3e21895544910513e47cec32fb2c77dc..a11dcb6682e5e46d7f88f4ba3e68f5125035ae78 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2019 ARM Limited
+ * Copyright (c) 2015-2019, 2021 ARM Limited
  * All rights reserved
  *
  * Redistribution and use in source and binary forms, with or without
 /include/ "vexpress_gem5_v1_base.dtsi"
 
 / {
-       /* The display processor needs custom configuration to setup its
-         * output ports. Disable it by default in the platform until the
-         * DT bindings have stabilize.
-        */
        dp0: hdlcd@2b000000 {
                compatible = "arm,hdlcd";
                reg = <0x0 0x2b000000 0x0 0x1000>;
                interrupts = <0 63 4>;
                clocks = <&osc_pxl>;
                clock-names = "pxlclk";
-
-               status = "disabled";
+               status = "ok";
        };
 };
 
index 6775727582901688c0dbce6403f30b39a1cd4f49..3e8003a582acdbc01e21b8214237158921bc18b9 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2019 ARM Limited
+ * Copyright (c) 2015-2019, 2021 ARM Limited
  * All rights reserved
  *
  * Redistribution and use in source and binary forms, with or without
 /include/ "vexpress_gem5_v2_base.dtsi"
 
 / {
-       /* The display processor needs custom configuration to setup its
-        * output ports. Disable it by default in the platform until the
-        * DT bindings have stabilize.
-        */
        dp0: hdlcd@2b000000 {
                compatible = "arm,hdlcd";
                reg = <0x0 0x2b000000 0x0 0x1000>;
                interrupts = <0 63 4>;
                clocks = <&osc_pxl>;
                clock-names = "pxlclk";
-               status = "disabled";
+               status = "ok";
        };
 };