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gas/testsuite/
authorH.J. Lu <hjl.tools@gmail.com>
Sat, 11 Feb 2006 17:00:59 +0000 (17:00 +0000)
committerH.J. Lu <hjl.tools@gmail.com>
Sat, 11 Feb 2006 17:00:59 +0000 (17:00 +0000)
2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

* gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".

* gas/i386/x86-64-crx-suffix.d: New file.
* gas/i386/x86-64-crx.d: Likewise.
* gas/i386/x86-64-crx.s: Likewise.

opcodes/

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

* i386-dis.c ('Z'): Add a new macro.
(dis386_twobyte): Use "movZ" for control register moves.

gas/testsuite/ChangeLog patch | blob | history
gas/testsuite/gas/i386/i386.exp patch | blob | history
gas/testsuite/gas/i386/x86-64-crx-suffix.d [new file with mode: 0644] patch | blob
gas/testsuite/gas/i386/x86-64-crx.d [new file with mode: 0644] patch | blob
gas/testsuite/gas/i386/x86-64-crx.s [new file with mode: 0644] patch | blob
opcodes/ChangeLog patch | blob | history
opcodes/i386-dis.c patch | blob | history

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index a51a1f4c63f315dd91e13c08a46145a724504a4d..193a0184fbfc342eb04e147a6ddd59c5b1fee80b 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/i386.exp: Add "x86-64-crx" and "x86-64-crx-suffix".
+
+       * gas/i386/x86-64-crx-suffix.d: New file.
+       * gas/i386/x86-64-crx.d: Likewise.
+       * gas/i386/x86-64-crx.s: Likewise.
+
 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 
        * testsuite/gas/m68k/all.exp: Add arch-cpu-1 test.
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 6638d4b61503c23626c926638a23ef9f57dab85b..91a5e9b079147d87ec5c60a2f975d31e02a8395a 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -132,6 +132,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-vmx"
     run_dump_test "immed64"
     run_dump_test "x86-64-prescott"
+    run_dump_test "x86-64-crx"
+    run_dump_test "x86-64-crx-suffix"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]
diff --git a/gas/testsuite/gas/i386/x86-64-crx-suffix.d b/gas/testsuite/gas/i386/x86-64-crx-suffix.d
new file mode 100644 (file)
index 0000000..1dc3584
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-crx-suffix.d
@@ -0,0 +1,21 @@
+#objdump: -dwMsuffix
+#name: x86-64 control register related opcodes (with suffixes)
+#source: x86-64-crx.s
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq[         ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq[         ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq[         ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq[         ]+?%rdi,%cr8
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq[         ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq[         ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq[         ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq[         ]+?%rdi,%cr8
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq[         ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq[         ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq[         ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq[         ]+?%rdi,%cr8
diff --git a/gas/testsuite/gas/i386/x86-64-crx.d b/gas/testsuite/gas/i386/x86-64-crx.d
new file mode 100644 (file)
index 0000000..8c1333f
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-crx.d
@@ -0,0 +1,21 @@
+#objdump: -dw
+#name: x86-64 control register related opcodes
+#source: x86-64-crx.s
+
+.*: +file format elf64-x86-64
+
+Disassembly of section .text:
+
+0+ <_start>:
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq?[        ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq?[        ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq?[        ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq?[        ]+?%rdi,%cr8
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq?[        ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq?[        ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq?[        ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq?[        ]+?%rdi,%cr8
+[      ]*[0-9a-f]+:    44 0f 20 c0[    ]+movq?[        ]+?%cr8,%rax
+[      ]*[0-9a-f]+:    44 0f 20 c7[    ]+movq?[        ]+?%cr8,%rdi
+[      ]*[0-9a-f]+:    44 0f 22 c0[    ]+movq?[        ]+?%rax,%cr8
+[      ]*[0-9a-f]+:    44 0f 22 c7[    ]+movq?[        ]+?%rdi,%cr8
diff --git a/gas/testsuite/gas/i386/x86-64-crx.s b/gas/testsuite/gas/i386/x86-64-crx.s
new file mode 100644 (file)
index 0000000..bc288c3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-crx.s
@@ -0,0 +1,18 @@
+.text
+_start:
+       movq    %cr8, %rax
+       movq    %cr8, %rdi
+       movq    %rax, %cr8
+       movq    %rdi, %cr8
+
+.att_syntax noprefix
+       movq    cr8, rax
+       movq    cr8, rdi
+       movq    rax, cr8
+       movq    rdi, cr8
+
+.intel_syntax noprefix
+       mov     rax, cr8
+       mov     rdi, cr8
+       mov     cr8, rax
+       mov     cr8, rdi
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9de01b6c023ff00657a0b425aa3494f806bbb8b7..629ab5e9bf77e7c2a03e3ef5bc8cdfc914e7f3dd 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c ('Z'): Add a new macro.
+       (dis386_twobyte): Use "movZ" for control register moves.
+
 2006-02-10  Nick Clifton  <nickc@redhat.com>
 
        * iq2000-asm.c: Regenerate.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 973682bde21e0a5e240575b68daaa61003275c3b..65cb43ce651d927fad5e3ad19c72c9241a1b2040 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -491,6 +491,7 @@ struct dis386 {
    'W' => print 'b' or 'w' ("w" or "de" in intel mode)
    'X' => print 's', 'd' depending on data16 prefix (for XMM)
    'Y' => 'q' if instruction has an REX 64bit overwrite prefix
+   'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
 
    Many of the above letters print nothing in Intel mode.  See "putop"
    for the details.
@@ -830,9 +831,9 @@ static const struct dis386 dis386_twobyte[] = {
   { "(bad)",           XX, XX, XX },
   { "(bad)",           XX, XX, XX },
   /* 20 */
-  { "movL",            Rm, Cm, XX },
+  { "movZ",            Rm, Cm, XX },
   { "movL",            Rm, Dm, XX },
-  { "movL",            Cm, Rm, XX },
+  { "movZ",            Cm, Rm, XX },
   { "movL",            Dm, Rm, XX },
   { "movL",            Rd, Td, XX },
   { "(bad)",           XX, XX, XX },
@@ -2856,6 +2857,15 @@ putop (const char *template, int sizeflag)
            break;
          *obufp++ = 'l';
          break;
+       case 'Z':
+         if (intel_syntax)
+           break;
+         if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
+           {
+             *obufp++ = 'q';
+             break;
+           }
+         /* Fall through.  */
        case 'L':
          if (intel_syntax)
            break;