Fix SR_U64 bit being ignored

diff --git a/riscv/dispatch b/riscv/dispatch
index 231853cb1881d949c74e25ca07dd76cd1d65606c..5afc3be3d9be97d72c81671e96096c5aa816caf5 100755 (executable)
--- a/riscv/dispatch
+++ b/riscv/dispatch
@@ -49,7 +49,7 @@ if filenum == numfiles:
 
 if filenum == numfiles+1:
   print '#define get_insn_func(insn, sr) \\'
-  print '  processor_t::dispatch_table[((((sr) & SR_S) ? (sr & SR_S64) : (SR_U64)) ? %d : 0) + ((insn).bits %% %d)]' % (tablesz, tablesz)
+  print '  processor_t::dispatch_table[((((sr) & SR_S) ? (sr & SR_S64) : (sr & SR_U64)) ? %d : 0) + ((insn).bits %% %d)]' % (tablesz, tablesz)
   
   print 'static const insn_func_t dispatch_table[%d];' % (2*tablesz)
   for i in range(0, tablesz):