cpu: add consistent guarding to *_impl.hh files.

diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 663159b9474e5a97bb357fc43c70ab18196252f8..bc581ed2d955e989792d3762dcd92e8426eaa92c 100644 (file)
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_BASE_DYN_INST_IMPL_HH__
+#define __CPU_BASE_DYN_INST_IMPL_HH__
+
 #include <iostream>
 #include <set>
 #include <sstream>
@@ -228,3 +231,5 @@ BaseDynInst<Impl>::eaSrcsReady()
 
     return true;
 }
+
+#endif//__CPU_BASE_DYN_INST_IMPL_HH__

diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index e18644e0edd6c7071d01ad815bae5c4a0f971a99..73bacdc05f44e038a728adb93d97c47226eedd95 100644 (file)
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -42,6 +42,9 @@
  *          Geoffrey Blake
  */
 
+#ifndef __CPU_CHECKER_CPU_IMPL_HH__
+#define __CPU_CHECKER_CPU_IMPL_HH__
+
 #include <list>
 #include <string>
 
@@ -684,3 +687,5 @@ Checker<Impl>::dumpInsts()
     }
 
 }
+
+#endif//__CPU_CHECKER_CPU_IMPL_HH__

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 2c1c9fef208b000d3741e1c17629219df457537e..becdfd06c878eafc47fe31ccbe49001121f0e6d5 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -40,6 +40,8 @@
  * Authors: Kevin Lim
  *          Korey Sewell
  */
+#ifndef __CPU_O3_COMMIT_IMPL_HH__
+#define __CPU_O3_COMMIT_IMPL_HH__
 
 #include <algorithm>
 #include <set>
@@ -1540,3 +1542,5 @@ DefaultCommit<Impl>::oldestReady()
         return InvalidThreadID;
     }
 }
+
+#endif//__CPU_O3_COMMIT_IMPL_HH__

diff --git a/src/cpu/o3/decode_impl.hh b/src/cpu/o3/decode_impl.hh
index 9ab67293180b2244153b9360e8a9fca4e5969533..c78e7f21160443e42b1a50ca57237337cb1e3dc7 100644 (file)
--- a/src/cpu/o3/decode_impl.hh
+++ b/src/cpu/o3/decode_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_O3_DECODE_IMPL_HH__
+#define __CPU_O3_DECODE_IMPL_HH__
+
 #include "arch/types.hh"
 #include "base/trace.hh"
 #include "config/the_isa.hh"
@@ -767,3 +770,5 @@ DefaultDecode<Impl>::decodeInsts(ThreadID tid)
         wroteToTimeBuffer = true;
     }
 }
+
+#endif//__CPU_O3_DECODE_IMPL_HH__

diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index 347d30324301c7e874ffe9e7ff5bacf34e29b953..4e14920772fbfe482cfc5eeeb575c1d16c2fbd3c 100644 (file)
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_O3_DYN_INST_IMPL_HH__
+#define __CPU_O3_DYN_INST_IMPL_HH__
+
 #include "base/cp_annotate.hh"
 #include "cpu/o3/dyn_inst.hh"
 #include "sim/full_system.hh"
@@ -255,3 +258,4 @@ BaseO3DynInst<Impl>::syscall(int64_t callnum)
     }
 }
 
+#endif//__CPU_O3_DYN_INST_IMPL_HH__

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index f6e46cc26fb1b9df552d0c990ca1bfe490d7e84d..d97c5ba361bf25e73b18e3fee1411a4539e7e406 100644 (file)
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -41,6 +41,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_FETCH_IMPL_HH__
+#define __CPU_O3_FETCH_IMPL_HH__
+
 #include <algorithm>
 #include <cstring>
 #include <list>
@@ -1631,3 +1634,5 @@ DefaultFetch<Impl>::profileStall(ThreadID tid) {
              tid, fetchStatus[tid]);
     }
 }
+
+#endif//__CPU_O3_FETCH_IMPL_HH__

diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index 947318d60b6918184e3439018c294deb2c786a6e..6c5c57fb7f173756c035a11807baa74ff4d9981d 100644 (file)
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_O3_IEW_IMPL_IMPL_HH__
+#define __CPU_O3_IEW_IMPL_IMPL_HH__
+
 // @todo: Fix the instantaneous communication among all the stages within
 // iew.  There's a clear delay between issue and execute, yet backwards
 // communication happens simultaneously.
@@ -1671,3 +1674,5 @@ DefaultIEW<Impl>::checkMisprediction(DynInstPtr &inst)
         }
     }
 }
+
+#endif//__CPU_O3_IEW_IMPL_IMPL_HH__

diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index 1c86b7c89ee88993732d5aa3a85f50079204ed37..f0b6826028bcd6ac5901da03d8125ec41c4628ca 100644 (file)
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -42,6 +42,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_INST_QUEUE_IMPL_HH__
+#define __CPU_O3_INST_QUEUE_IMPL_HH__
+
 #include <limits>
 #include <vector>
 
@@ -1508,3 +1511,5 @@ InstructionQueue<Impl>::dumpInsts()
         ++num;
     }
 }
+
+#endif//__CPU_O3_INST_QUEUE_IMPL_HH__

diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 70db92714c9e84a6f48842df1c4d4d545103ad92..7e89968a8f2b9459512df540fe0f42cb13690c17 100644 (file)
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Korey Sewell
  */
 
+#ifndef __CPU_O3_LSQ_IMPL_HH__
+#define __CPU_O3_LSQ_IMPL_HH__
+
 #include <algorithm>
 #include <list>
 #include <string>
@@ -658,3 +661,5 @@ LSQ<Impl>::dumpInsts() const
         thread[tid].dumpInsts();
     }
 }
+
+#endif//__CPU_O3_LSQ_IMPL_HH__

diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 44b8e904176dac4d4588e08414074b7171be5aa0..77b67ac6992512cbfaab6fd96d95b0da56617347 100644 (file)
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -42,6 +42,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_LSQ_UNIT_IMPL_HH__
+#define __CPU_O3_LSQ_UNIT_IMPL_HH__
+
 #include "arch/generic/debugfaults.hh"
 #include "arch/locked_mem.hh"
 #include "base/str.hh"
@@ -1289,3 +1292,5 @@ LSQUnit<Impl>::dumpInsts() const
 
     cprintf("\n");
 }
+
+#endif//__CPU_O3_LSQ_UNIT_IMPL_HH__

diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh
index 7fbea0216b9ffc79d4c1dfd08752f74469423d0b..009ae2b48e84320e6fe86bdbb62a81703258b037 100644 (file)
--- a/src/cpu/o3/mem_dep_unit_impl.hh
+++ b/src/cpu/o3/mem_dep_unit_impl.hh
@@ -40,6 +40,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_O3_MEM_DEP_UNIT_IMPL_HH__
+#define __CPU_O3_MEM_DEP_UNIT_IMPL_HH__
+
 #include <map>
 
 #include "cpu/o3/inst_queue.hh"
@@ -594,3 +597,5 @@ MemDepUnit<MemDepPred, Impl>::dumpLists()
     cprintf("Memory dependence entries: %i\n", MemDepEntry::memdep_count);
 #endif
 }
+
+#endif//__CPU_O3_MEM_DEP_UNIT_IMPL_HH__

diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh
index db71893715ff4dbdfb99c38b8394b7a4d72ba751..242d5a4e3d4e10ef6f4d27522ed0246ddd9e2007 100644 (file)
--- a/src/cpu/o3/rename_impl.hh
+++ b/src/cpu/o3/rename_impl.hh
@@ -42,6 +42,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_RENAME_IMPL_HH__
+#define __CPU_O3_RENAME_IMPL_HH__
+
 #include <list>
 
 #include "arch/isa_traits.hh"
@@ -1383,3 +1386,5 @@ DefaultRename<Impl>::dumpHistory()
         }
     }
 }
+
+#endif//__CPU_O3_RENAME_IMPL_HH__

diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh
index b33221f155f1cf2a29d59c7607b5dd8df8ad7a24..c8ceb29092e3569d8c1d237eaa598ac87a73a24f 100644 (file)
--- a/src/cpu/o3/rob_impl.hh
+++ b/src/cpu/o3/rob_impl.hh
@@ -41,6 +41,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_ROB_IMPL_HH__
+#define __CPU_O3_ROB_IMPL_HH__
+
 #include <list>
 
 #include "cpu/o3/rob.hh"
@@ -560,3 +563,5 @@ ROB<Impl>::findInst(ThreadID tid, InstSeqNum squash_inst)
     }
     return NULL;
 }
+
+#endif//__CPU_O3_ROB_IMPL_HH__

diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index 006d325fc2ee235135f7d505fd51d0ecbe6c8571..c818260f4d2613f092e2706098cdbbd5a9ae30c2 100755 (executable)
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -42,6 +42,9 @@
  *          Korey Sewell
  */
 
+#ifndef __CPU_O3_THREAD_CONTEXT_IMPL_HH__
+#define __CPU_O3_THREAD_CONTEXT_IMPL_HH__
+
 #include "arch/kernel_stats.hh"
 #include "arch/registers.hh"
 #include "config/the_isa.hh"
@@ -297,6 +300,7 @@ O3ThreadContext<Impl>::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
     conditionalSquash();
 }
 
+#endif//__CPU_O3_THREAD_CONTEXT_IMPL_HH__
 template <class Impl>
 void
 O3ThreadContext<Impl>::setMiscReg(int misc_reg, const MiscReg &val)

diff --git a/src/cpu/ozone/back_end_impl.hh b/src/cpu/ozone/back_end_impl.hh
index bcc897369094c750e97546f5771f31a2b8115a09..a72cf67c058e68946e46c3f5f8e1bfc86ab61055 100644 (file)
--- a/src/cpu/ozone/back_end_impl.hh
+++ b/src/cpu/ozone/back_end_impl.hh
@@ -28,6 +28,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_OZONE_BACK_END_IMPL_HH__
+#define __CPU_OZONE_BACK_END_IMPL_HH__
+
 #include "cpu/ozone/back_end.hh"
 #include "encumbered/cpu/full/op_class.hh"
 
@@ -1912,3 +1915,5 @@ BackEnd<Impl>::dumpInsts()
         ++num;
     }
 }
+
+#endif//__CPU_OZONE_BACK_END_IMPL_HH__

diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index b4b49a55b28ae6d000c1ed762497e144c0a1a1de..ff99cc7f6f75850bfd9fb1006a60f67581506a71 100644 (file)
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -30,6 +30,9 @@
  *          Nathan Binkert
  */
 
+#ifndef __CPU_OZONE_CPU_IMPL_HH__
+#define __CPU_OZONE_CPU_IMPL_HH__
+
 #include "arch/alpha/osfpal.hh"
 #include "arch/isa_traits.hh" // For MachInst
 #include "arch/kernel_stats.hh"
@@ -868,6 +871,8 @@ OzoneCPU<Impl>::OzoneTC::setMiscRegNoEffect(int misc_reg, const MiscReg &val)
     }
 }
 
+#endif//__CPU_OZONE_CPU_IMPL_HH__
+
 template <class Impl>
 void
 OzoneCPU<Impl>::OzoneTC::setMiscReg(int misc_reg, const MiscReg &val)

diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh
index 2066c58d7816ddfcd20e6ceb0e9e932299dace0c..7c0bd7a0215958091750d262f0bb3ce267cc58bc 100644 (file)
--- a/src/cpu/ozone/dyn_inst_impl.hh
+++ b/src/cpu/ozone/dyn_inst_impl.hh
@@ -28,6 +28,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_OZONE_DYN_INST_IMPL_HH__
+#define __CPU_OZONE_DYN_INST_IMPL_HH__
+
 #include "config/the_isa.hh"
 #include "cpu/ozone/dyn_inst.hh"
 #include "kern/kernel_stats.hh"
@@ -270,3 +273,5 @@ OzoneDynInst<Impl>::syscall(uint64_t &callnum)
 {
     this->cpu->syscall(callnum);
 }
+
+#endif//__CPU_OZONE_DYN_INST_IMPL_HH__

diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index 66bcc62276ec742caf5ebb68ac7b0b35ebb140e3..3b602b82e559a1cf32560f2b86eca8359e37c636 100644 (file)
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -27,6 +27,8 @@
  *
  * Authors: Kevin Lim
  */
+#ifndef __CPU_OZONE_BACK_END_IMPL_HH__
+#define __CPU_OZONE_BACK_END_IMPL_HH__
 
 #include "arch/isa_traits.hh"
 #include "arch/utility.hh"
@@ -989,3 +991,5 @@ FrontEnd<Impl>::dumpInsts()
         buff_it++;
     }
 }
+
+#endif//__CPU_OZONE_BACK_END_IMPL_HH__

diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 7bb876e4a23d1fff655e8536fb0635f3292d7dbf..8d5511f1c0e2c08570fc6859b7d2e41c70560c80 100644 (file)
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -28,6 +28,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_OZONE_INORDER_BACK_END_IMPL_HH__
+#define __CPU_OZONE_INORDER_BACK_END_IMPL_HH__
+
 #include "arch/types.hh"
 #include "config/the_isa.hh"
 #include "cpu/ozone/inorder_back_end.hh"
@@ -521,3 +524,4 @@ InorderBackEnd<Impl>::DCacheCompletionEvent::description() const
 {
     return "DCache completion";
 }
+#endif//__CPU_OZONE_INORDER_BACK_END_IMPL_HH__

diff --git a/src/cpu/ozone/inst_queue_impl.hh b/src/cpu/ozone/inst_queue_impl.hh
index f2f88760beaaff8136775a1e72db35a609fc9d65..babee399d59dbbba9182681b6d81c31096b1607b 100644 (file)
--- a/src/cpu/ozone/inst_queue_impl.hh
+++ b/src/cpu/ozone/inst_queue_impl.hh
@@ -28,6 +28,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_OZONE_INST_QUEUE_IMPL_HH__
+#define __CPU_OZONE_INST_QUEUE_IMPL_HH__
+
 // Todo:
 // Current ordering allows for 0 cycle added-to-scheduled.  Could maybe fake
 // it; either do in reverse order, or have added instructions put into a
@@ -1342,3 +1345,5 @@ InstQueue<Impl>::dumpInsts()
 */
     }
 }
+
+#define//__CPU_OZONE_INST_QUEUE_IMPL_HH__

diff --git a/src/cpu/ozone/lsq_unit_impl.hh b/src/cpu/ozone/lsq_unit_impl.hh
index 3ee96585ac856fbfc53b05576a524097c54aeb69..a2d431cc25b9c4343ee33bb961485915289903ff 100644 (file)
--- a/src/cpu/ozone/lsq_unit_impl.hh
+++ b/src/cpu/ozone/lsq_unit_impl.hh
@@ -27,6 +27,8 @@
  *
  * Authors: Kevin Lim
  */
+#ifndef __CPU_OZONE_LSQ_UNIT_IMPL_HH__
+#define __CPU_OZONE_LSQ_UNIT_IMPL_HH__
 
 #include "base/str.hh"
 #include "config/the_isa.hh"
@@ -839,3 +841,4 @@ OzoneLSQ<Impl>::decrLdIdx(int &load_idx)
     if (--load_idx < 0)
         load_idx += LQEntries;
 }
+#endif//__CPU_OZONE_LSQ_UNIT_IMPL_HH__

diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index 79ae434652629cb748b3892039b4603a7a0f4dd3..c979d23b6bf14b657a869a2c3167acce9804ab53 100644 (file)
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -27,6 +27,8 @@
  *
  * Authors: Kevin Lim
  */
+#ifndef __CPU_OZONE_LW_BACK_END_IMPL_HH__
+#define __CPU_OZONE_LW_BACK_END_IMPL_HH__
 
 #include "config/the_isa.hh"
 #include "cpu/checker/cpu.hh"
@@ -1672,3 +1674,4 @@ LWBackEnd<Impl>::dumpInsts()
     }
     cprintf("\n");
 }
+#endif//__CPU_OZONE_LW_BACK_END_IMPL_HH__

diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh
index 79b2b8f169770df9475ec0ab9411ceb14556fa95..ed036d664e0acc4797295d49e5f8ca19ebe315e5 100644 (file)
--- a/src/cpu/ozone/lw_lsq_impl.hh
+++ b/src/cpu/ozone/lw_lsq_impl.hh
@@ -28,6 +28,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_OZONE_LW_LSQ_IMPL_HH__
+#define __CPU_OZONE_LW_LSQ_IMPL_HH__
+
 #include "base/str.hh"
 #include "config/the_isa.hh"
 #include "cpu/checker/cpu.hh"
@@ -961,3 +964,5 @@ OzoneLWLSQ<Impl>::takeOverFrom(ThreadContext *old_tc)
 
     blockedLoadSeqNum = 0;
 }
+
+#endif//__CPU_OZONE_LW_LSQ_IMPL_HH__

diff --git a/src/cpu/ozone/rename_table_impl.hh b/src/cpu/ozone/rename_table_impl.hh
index e8071e2b3c85b07d801fa63378ce280c0b76da19..06551b3cb18a95236a6e27243e0e4af3071df1a4 100644 (file)
--- a/src/cpu/ozone/rename_table_impl.hh
+++ b/src/cpu/ozone/rename_table_impl.hh
@@ -27,6 +27,8 @@
  *
  * Authors: Kevin Lim
  */
+#ifndef __CPU_OZONE_RENAME_TABLE_IMPL_HH__
+#define __CPU_OZONE_RENAME_TABLE_IMPL_HH__
 
 #include <cstdlib>  // Not really sure what to include to get NULL
 
@@ -52,3 +54,5 @@ RenameTable<Impl>::copyFrom(const RenameTable<Impl> &table_to_copy)
         table[i] = table_to_copy.table[i];
     }
 }
+
+#endif//__CPU_OZONE_RENAME_TABLE_IMPL_HH__

diff --git a/src/cpu/pred/bpred_unit_impl.hh b/src/cpu/pred/bpred_unit_impl.hh
index c3d1b7e9bc2d19956519c7499bb357522bbb8055..2dc82ec6dfd67e7af294e3ea292229ac713d7a15 100644 (file)
--- a/src/cpu/pred/bpred_unit_impl.hh
+++ b/src/cpu/pred/bpred_unit_impl.hh
@@ -42,6 +42,9 @@
  * Authors: Kevin Lim
  */
 
+#ifndef __CPU_PRED_BPRED_UNIT_IMPL_HH__
+#define __CPU_PRED_BPRED_UNIT_IMPL_HH__
+
 #include <algorithm>
 
 #include "arch/isa_traits.hh"
@@ -534,3 +537,5 @@ BPredUnit::dump()
         }
     }
 }
+
+#endif//__CPU_PRED_BPRED_UNIT_IMPL_HH__

diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index b4ace5f6cc0cc07430eecb4400998e3f176fd000..6d70118199a94c0b79e68285cc274eb6f035ce8d 100644 (file)
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -46,6 +46,9 @@
  *          Andreas Sandberg
  */
 
+#ifndef __MEM_CACHE_CACHE_IMPL_HH__
+#define __MEM_CACHE_CACHE_IMPL_HH__
+
 /**
  * @file
  * Cache definitions.
@@ -1899,3 +1902,5 @@ MemSidePort::MemSidePort(const std::string &_name, Cache<TagStore> *_cache,
       _queue(*_cache, *this, _label), cache(_cache)
 {
 }
+
+#endif//__MEM_CACHE_CACHE_IMPL_HH__