i915tex: Wait for pending scheduled flips before switching vsync pipe.
authorMichel Dänzer <michel@tungstengraphics.com>
Fri, 9 Mar 2007 19:00:13 +0000 (20:00 +0100)
committerMichel Dänzer <michel@tungstengraphics.com>
Fri, 9 Mar 2007 19:00:13 +0000 (20:00 +0100)
This avoids hangs when the vblank sequence numbers are not in sync between
pipes, in particular when they run at different refresh rates.

src/mesa/drivers/dri/i915tex/intel_buffers.c

index 174f3c6351a8ce2b4750aa17a6593978c085711c..164395719cd4f2c0276c75cbdcad4e1940243902 100644 (file)
@@ -300,8 +300,27 @@ intelWindowMoved(struct intel_context *intel)
       }
 
       if (flags != intel_fb->vblank_flags) {
+        drmVBlank vbl;
+        int i;
+
+        vbl.request.type = DRM_VBLANK_ABSOLUTE;
+
+        if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
+           vbl.request.type |= DRM_VBLANK_SECONDARY;
+        }
+
+        for (i = 0; i < intel_fb->pf_num_pages; i++) {
+           vbl.request.sequence = intel_fb->color_rb[i]->vbl_pending;
+           drmWaitVBlank(intel->driFd, &vbl);
+        }
+
         intel_fb->vblank_flags = flags;
         driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq);
+        intel_fb->vbl_waited = intel_fb->vbl_seq;
+
+        for (i = 0; i < intel_fb->pf_num_pages; i++) {
+           intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_waited;
+        }
       }
    } else {
       intel_fb->vblank_flags &= ~VBLANK_FLAG_SECONDARY;