fr30.c (call_operand): Tighten and rework to match rules for call RTL expressions.

        * fr30.c (call_operand): Tighten and rework to match rules for
        call RTL expressions.
        * fr30.h (PREDICATE_CODES, case call_operand): Only allow MEMs.
        * fr30.md (call patterns): Improve constraints.

From-SVN: r31405

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fb8f50da014fb992d732d1bcf42ddb68dfbb99ae..2a61193cddb030c7aded8c41cfc5814343046013 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Fri Jan 14 00:28:06 2000  Jeffrey A Law  (law@cygnus.com)
+
+       * fr30.c (call_operand): Tighten and rework to match rules for
+       call RTL expressions.
+       * fr30.h (PREDICATE_CODES, case call_operand): Only allow MEMs.
+       * fr30.md (call patterns): Improve constraints.
+
 Thu Jan 13 23:44:03 2000  Richard Henderson  <rth@cygnus.com>
 
        * fr30.c (fr30_expand_epilogue): Revert last change.

diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c
index a24ac277ca3300583f539d82641c0027563984e3..319ea24271776bd8722ca9c0c1d149eefa1b69ba 100644 (file)
--- a/gcc/config/fr30/fr30.c
+++ b/gcc/config/fr30/fr30.c
@@ -847,11 +847,11 @@ low_register_operand (operand, mode)
 int
 call_operand (operand, mode)
      rtx operand;
-     Mmode mode;
+     Mmode mode ATTRIBUTE_UNUSED;
 {
-  return nonimmediate_operand (operand, mode)
-    || (GET_CODE (operand) == MEM
-       && GET_CODE (XEXP (operand, 0)) == SYMBOL_REF);
+  return (GET_CODE (operand) == MEM
+         && (GET_CODE (XEXP (operand, 0)) == SYMBOL_REF
+             || GET_CODE (XEXP (operand, 0)) == REG));
 }
 
 /* Returns true iff all the registers in the operands array

diff --git a/gcc/config/fr30/fr30.h b/gcc/config/fr30/fr30.h
index 0a914995bbd71848f16ad4c2de7a9c4f5d14ccc7..f28ab374da20477280c5b53262e48b72ec76e573 100644 (file)
--- a/gcc/config/fr30/fr30.h
+++ b/gcc/config/fr30/fr30.h
@@ -1746,7 +1746,7 @@ extern struct rtx_def * fr30_compare_op1;
   { "stack_add_operand",       { CONST_INT }},         \
   { "high_register_operand",   { REG }},               \
   { "low_register_operand",    { REG }},               \
-  { "call_operand",            { REG, MEM }},          \
+  { "call_operand",            { MEM }},               \
   { "fp_displacement_operand", { CONST_INT }},         \
   { "sp_displacement_operand", { CONST_INT }},         \
   { "add_immediate_operand",   { REG, CONST_INT }},

diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md
index 8dcd782af5d29b46731d6bd6f0408bb97cac4dca..955fa15fade11b1c0aa26bb43a3d330aad929c9e 100644 (file)
--- a/gcc/config/fr30/fr30.md
+++ b/gcc/config/fr30/fr30.md
@@ -1233,7 +1233,7 @@
 ;; registers used as operands.
 
 (define_insn "call"
-  [(call (match_operand 0 "call_operand" "Qrm")
+  [(call (match_operand 0 "call_operand" "Qm")
         (match_operand 1 ""             "g"))
    (clobber (reg:SI 17))]
   ""
@@ -1250,7 +1250,7 @@
 
 (define_insn "call_value"
   [(set (match_operand 0 "register_operand"  "=r")
-       (call (match_operand 1 "call_operand" "Qrm")
+       (call (match_operand 1 "call_operand" "Qm")
              (match_operand 2 ""             "g")))
    (clobber (reg:SI 17))]
   ""