projects / gcc.git / commitdiff
? search:
summary | shortlog | log | commit | commitdiff | tree
raw | patch | inline | side by side (parent: 575d952)
AVX-512. Extend vpternlog, valign, vrotate insns.
authorAlexander Ivchenko <alexander.ivchenko@intel.com>
Fri, 12 Sep 2014 07:38:47 +0000 (07:38 +0000)
committerKirill Yukhin <kyukhin@gcc.gnu.org>
Fri, 12 Sep 2014 07:38:47 +0000 (07:38 +0000)
gcc/
* config/i386/sse.md
(define_mode_iterator VI48_AVX512VL): New.
(define_expand "<avx512>_vternlog<mode>_maskz"): Rename from
"avx512f_vternlog<mode>_maskz" and update mode iterator.
(define_insn "<avx512>_vternlog<mode><sd_maskz_name>"): Rename
from "avx512f_vternlog<mode><sd_maskz_name>" and update mode iterator.
(define_insn "<avx512>_vternlog<mode>_mask"): Rename from
"avx512f_vternlog<mode>_mask" and update mode iterator.
(define_insn "<mask_codefor><avx512>_align<mode><mask_name>"): Rename
from "<mask_codefor>avx512f_align<mode><mask_name>" and update mode
iterator.
(define_insn "<avx512>_<rotate>v<mode><mask_name>"): Rename from
"avx512f_<rotate>v<mode><mask_name>" and update mode iterator.
(define_insn "<avx512>_<rotate><mode><mask_name>"): Rename from
"avx512f_<rotate><mode><mask_name>" and update mode iterator.
(define_insn "clz<mode>2<mask_name>"): Use VI48_AVX512VL mode iterator.
(define_insn "<mask_codefor>conflict<mode><mask_name>"): Ditto.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215203

gcc/ChangeLog patch | blob | history
gcc/config/i386/sse.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d6cdc269b10767ed62227bda2f5788b300122182..4b70dd5e01f1d145575a1b12e72c34ef676e99a2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,30 @@
+2014-09-12  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/sse.md
+       (define_mode_iterator VI48_AVX512VL): New.
+       (define_expand "<avx512>_vternlog<mode>_maskz"): Rename from
+       "avx512f_vternlog<mode>_maskz" and update mode iterator.
+       (define_insn "<avx512>_vternlog<mode><sd_maskz_name>"): Rename
+       from "avx512f_vternlog<mode><sd_maskz_name>" and update mode iterator.
+       (define_insn "<avx512>_vternlog<mode>_mask"): Rename from
+       "avx512f_vternlog<mode>_mask" and update mode iterator.
+       (define_insn "<mask_codefor><avx512>_align<mode><mask_name>"): Rename
+       from "<mask_codefor>avx512f_align<mode><mask_name>" and update mode
+       iterator.
+       (define_insn "<avx512>_<rotate>v<mode><mask_name>"): Rename from
+       "avx512f_<rotate>v<mode><mask_name>" and update mode iterator.
+       (define_insn "<avx512>_<rotate><mode><mask_name>"): Rename from
+       "avx512f_<rotate><mode><mask_name>" and update mode iterator.
+       (define_insn "clz<mode>2<mask_name>"): Use VI48_AVX512VL mode iterator.
+       (define_insn "<mask_codefor>conflict<mode><mask_name>"): Ditto.
+
 2014-09-12  Alexander Ivchenko  <alexander.ivchenko@intel.com>
            Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
            Anna Tikhonova  <anna.tikhonova@intel.com>
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 92f94b98cb5c21b7b62f47bc03ac942890353239..73bdd224a67abf2dc2aeb15f23c6cf52daaf4147 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -7158,27 +7158,27 @@
   [(set_attr "prefix" "evex")
    (set_attr "mode"  "<MODE>")])
 
-(define_expand "avx512f_vternlog<mode>_maskz"
-  [(match_operand:VI48_512 0 "register_operand")
-   (match_operand:VI48_512 1 "register_operand")
-   (match_operand:VI48_512 2 "register_operand")
-   (match_operand:VI48_512 3 "nonimmediate_operand")
+(define_expand "<avx512>_vternlog<mode>_maskz"
+  [(match_operand:VI48_AVX512VL 0 "register_operand")
+   (match_operand:VI48_AVX512VL 1 "register_operand")
+   (match_operand:VI48_AVX512VL 2 "register_operand")
+   (match_operand:VI48_AVX512VL 3 "nonimmediate_operand")
    (match_operand:SI 4 "const_0_to_255_operand")
    (match_operand:<avx512fmaskmode> 5 "register_operand")]
   "TARGET_AVX512F"
 {
-  emit_insn (gen_avx512f_vternlog<mode>_maskz_1 (
+  emit_insn (gen_<avx512>_vternlog<mode>_maskz_1 (
     operands[0], operands[1], operands[2], operands[3],
     operands[4], CONST0_RTX (<MODE>mode), operands[5]));
   DONE;
 })
 
-(define_insn "avx512f_vternlog<mode><sd_maskz_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (unspec:VI48_512
-         [(match_operand:VI48_512 1 "register_operand" "0")
-          (match_operand:VI48_512 2 "register_operand" "v")
-          (match_operand:VI48_512 3 "nonimmediate_operand" "vm")
+(define_insn "<avx512>_vternlog<mode><sd_maskz_name>"
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (unspec:VI48_AVX512VL
+         [(match_operand:VI48_AVX512VL 1 "register_operand" "0")
+          (match_operand:VI48_AVX512VL 2 "register_operand" "v")
+          (match_operand:VI48_AVX512VL 3 "nonimmediate_operand" "vm")
           (match_operand:SI 4 "const_0_to_255_operand")]
          UNSPEC_VTERNLOG))]
   "TARGET_AVX512F"
@@ -7187,13 +7187,13 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_vternlog<mode>_mask"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (vec_merge:VI48_512
-         (unspec:VI48_512
-           [(match_operand:VI48_512 1 "register_operand" "0")
-            (match_operand:VI48_512 2 "register_operand" "v")
-            (match_operand:VI48_512 3 "nonimmediate_operand" "vm")
+(define_insn "<avx512>_vternlog<mode>_mask"
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (vec_merge:VI48_AVX512VL
+         (unspec:VI48_AVX512VL
+           [(match_operand:VI48_AVX512VL 1 "register_operand" "0")
+            (match_operand:VI48_AVX512VL 2 "register_operand" "v")
+            (match_operand:VI48_AVX512VL 3 "nonimmediate_operand" "vm")
             (match_operand:SI 4 "const_0_to_255_operand")]
            UNSPEC_VTERNLOG)
          (match_dup 1)
@@ -7227,12 +7227,12 @@
     [(set_attr "prefix" "evex")
      (set_attr "mode" "<ssescalarmode>")])
 
-(define_insn "<mask_codefor>avx512f_align<mode><mask_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-        (unspec:VI48_512 [(match_operand:VI48_512 1 "register_operand" "v")
-                         (match_operand:VI48_512 2 "nonimmediate_operand" "vm")
-                         (match_operand:SI 3 "const_0_to_255_operand")]
-                        UNSPEC_ALIGN))]
+(define_insn "<mask_codefor><avx512>_align<mode><mask_name>"
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+        (unspec:VI48_AVX512VL [(match_operand:VI48_AVX512VL 1 "register_operand" "v")
+                              (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm")
+                              (match_operand:SI 3 "const_0_to_255_operand")]
+                             UNSPEC_ALIGN))]
   "TARGET_AVX512F"
   "valign<ssemodesuffix>\t{%3, %2, %1, %0<mask_operand4>|%0<mask_operand4>, %1, %2, %3}";
   [(set_attr "prefix" "evex")
@@ -9430,20 +9430,20 @@
    (set_attr "prefix" "orig,vex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_<rotate>v<mode><mask_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (any_rotate:VI48_512
-         (match_operand:VI48_512 1 "register_operand" "v")
-         (match_operand:VI48_512 2 "nonimmediate_operand" "vm")))]
+(define_insn "<avx512>_<rotate>v<mode><mask_name>"
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (any_rotate:VI48_AVX512VL
+         (match_operand:VI48_AVX512VL 1 "register_operand" "v")
+         (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm")))]
   "TARGET_AVX512F"
   "vp<rotate>v<ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
   [(set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_<rotate><mode><mask_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (any_rotate:VI48_512
-         (match_operand:VI48_512 1 "nonimmediate_operand" "vm")
+(define_insn "<avx512>_<rotate><mode><mask_name>"
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (any_rotate:VI48_AVX512VL
+         (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "vm")
          (match_operand:SI 2 "const_0_to_255_operand")))]
   "TARGET_AVX512F"
   "vp<rotate><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
@@ -17011,9 +17011,9 @@
    (set_attr "mode" "<ssescalarmode>")])
 
 (define_insn "clz<mode>2<mask_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (clz:VI48_512
-         (match_operand:VI48_512 1 "nonimmediate_operand" "vm")))]
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (clz:VI48_AVX512VL
+         (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "vm")))]
   "TARGET_AVX512CD"
   "vplzcnt<ssemodesuffix>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
   [(set_attr "type" "sse")
@@ -17021,9 +17021,9 @@
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "<mask_codefor>conflict<mode><mask_name>"
-  [(set (match_operand:VI48_512 0 "register_operand" "=v")
-       (unspec:VI48_512
-         [(match_operand:VI48_512 1 "nonimmediate_operand" "vm")]
+  [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
+       (unspec:VI48_AVX512VL
+         [(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "vm")]
          UNSPEC_CONFLICT))]
   "TARGET_AVX512CD"
   "vpconflict<ssemodesuffix>\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"