(no commit message)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index 78157e1d11c513e9798c3bdeeb8a3b18a7b56212..9da87f9a5833e5c7e865f687b0ace05d87c50dd8 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -60,10 +60,16 @@ Purpose:
 * To provide a vectorised version of the same, suitable for advanced
   predication
 
-Side-effects:
+Useful side-effects:
 
-* mtcrweird when RA=0 is a means to set or clear arbitrary CR bits
+* mtcrweird when RA=0 is a means to set or clear 
+  multiple arbitrary CR Field bits simultaneously,
   using immediates embedded within the instruction.
+* With SVP64 on the weird instructions there is bit-for-bit interaction
+  between GPR predicate masks (r3, r10, r31) and the source
+  or destination GPR, in ways that are not possible with other
+  SVP64 instructions because normal SVP64 is bit-per-element.
+  On these weird instructions the element in effect *is* a bit.
 
 # Bit ordering.