gcc: fix unused variable warnings from GCC 4.6.1

--HG--
extra : rebase_source : f9e22de341493a25ac6106c16ac35c61c128a080

diff --git a/src/arch/arm/nativetrace.cc b/src/arch/arm/nativetrace.cc
index e276833e237ff0847b7cbf74c8ca23e45906dead..875ceae3189a4c938b3039836f930538df8344ef 100644 (file)
--- a/src/arch/arm/nativetrace.cc
+++ b/src/arch/arm/nativetrace.cc
@@ -156,18 +156,23 @@ Trace::ArmNativeTrace::check(NativeTraceRecord *record)
     // Regular int regs
     for (int i = 0; i < STATE_NUMVALS; i++) {
         if (nState.changed[i] || mState.changed[i]) {
-            const char *vergence = "  ";
             bool oldMatch = (mState.oldState[i] == nState.oldState[i]);
             bool newMatch = (mState.newState[i] == nState.newState[i]);
             if (oldMatch && newMatch) {
                 // The more things change, the more they stay the same.
                 continue;
-            } else if (oldMatch && !newMatch) {
+            }
+
+            errorFound = true;
+
+#ifndef NDEBUG
+            const char *vergence = "  ";
+            if (oldMatch && !newMatch) {
                 vergence = "<>";
             } else if (!oldMatch && newMatch) {
                 vergence = "><";
             }
-            errorFound = true;
+
             if (!nState.changed[i]) {
                 DPRINTF(ExecRegDelta, "%s [%5s] "\
                                       "Native:         %#010x         "\
@@ -190,6 +195,7 @@ Trace::ArmNativeTrace::check(NativeTraceRecord *record)
                                       nState.oldState[i], nState.newState[i],
                                       mState.oldState[i], mState.newState[i]);
             }
+#endif
         }
     }
     if (errorFound) {

diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index 980b66bdce9eb3a6a439cd6da4884a9abb2ebe01..e0b707f439635239db24bc2610adcbe66e97e508 100644 (file)
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -648,8 +648,7 @@ BaseRemoteGDB::trap(int type)
     bufferSize = gdbregs.bytes() * 2 + 256;
     buffer = (char*)malloc(bufferSize);
 
-    TheISA::PCState pc = context->pcState();
-    DPRINTF(GDBMisc, "trap: PC=%s\n", pc);
+    DPRINTF(GDBMisc, "trap: PC=%s\n", context->pcState());
 
     clearSingleStep();
 

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index b0ec349dc8d4c207051e9537189a3280b4f558f2..ccab47d2f6bdfba1f57809537fb283f127a5c633 100644 (file)
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1053,8 +1053,8 @@ DefaultFetch<Impl>::checkSignalsAndUpdate(ThreadID tid)
 
         if (fetchStatus[tid] != Squashing) {
 
-            TheISA::PCState nextPC = fromDecode->decodeInfo[tid].nextPC;
-            DPRINTF(Fetch, "Squashing from decode with PC = %s\n", nextPC);
+            DPRINTF(Fetch, "Squashing from decode with PC = %s\n",
+                fromDecode->decodeInfo[tid].nextPC);
             // Squash unless we're already squashing
             squashFromDecode(fromDecode->decodeInfo[tid].nextPC,
                              fromDecode->decodeInfo[tid].squashInst,

diff --git a/src/dev/i8254xGBe.cc b/src/dev/i8254xGBe.cc
index d26bbf4ba1f24069ed189535cd4c47dd491fe3bb..957aca19c450ca294c87f463673f21d299041c96 100644 (file)
--- a/src/dev/i8254xGBe.cc
+++ b/src/dev/i8254xGBe.cc
@@ -2118,11 +2118,12 @@ IGbE::txStateMachine()
     // iteration we'll get the rest of the data
     if (txPacket && txDescCache.packetAvailable()
         && !txDescCache.packetMultiDesc() && txPacket->length) {
-        bool success;
-
         anQ("TXS", "TX FIFO Q");
         DPRINTF(EthernetSM, "TXS: packet placed in TX FIFO\n");
-        success = txFifo.push(txPacket);
+#ifndef NDEBUG
+        bool success =
+#endif
+            txFifo.push(txPacket);
         txFifoTick = true && !drainEvent;
         assert(success);
         txPacket = NULL;

diff --git a/src/dev/ide_ctrl.cc b/src/dev/ide_ctrl.cc
index 291ce1389910a66ad80d60c2a292e60b43167214..5a663bac95cc2e122ad00306700a9a7140eabd93 100644 (file)
--- a/src/dev/ide_ctrl.cc
+++ b/src/dev/ide_ctrl.cc
@@ -490,6 +490,7 @@ IdeController::dispatchAccess(PacketPtr pkt, bool read)
         panic("IDE controller access to invalid address: %#x\n", addr);
     }
 
+#ifndef NDEBUG
     uint32_t data;
     if (pkt->getSize() == 1)
         data = pkt->get<uint8_t>();
@@ -499,6 +500,7 @@ IdeController::dispatchAccess(PacketPtr pkt, bool read)
         data = pkt->get<uint32_t>();
     DPRINTF(IdeCtrl, "%s from offset: %#x size: %#x data: %#x\n",
             read ? "Read" : "Write", pkt->getAddr(), pkt->getSize(), data);
+#endif
 
     pkt->makeAtomicResponse();
 }

diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 1c7e1694ad5cd551fb11d5a92bc03dc1b3099055..b87dfa7047fe1a4a9bf12f6f6acfd19e79229e60 100644 (file)
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -33,6 +33,7 @@
 #include <string>
 
 #include "arch/vtophys.hh"
+#include "base/compiler.hh"
 #include "base/debug.hh"
 #include "base/inet.hh"
 #include "base/types.hh"
@@ -404,7 +405,7 @@ Device::read(PacketPtr pkt)
 
     prepareRead(cpu, index);
 
-    uint64_t value = 0;
+    uint64_t value M5_VAR_USED = 0;
     if (pkt->getSize() == 4) {
         uint32_t reg = regData32(raddr);
         pkt->set(reg);
@@ -916,6 +917,7 @@ Device::rxKick()
                 VirtualReg *vn = &virtualRegs[i];
                 bool busy = Regs::get_RxDone_Busy(vn->RxDone);
                 if (vn->rxIndex != end) {
+#ifndef NDEBUG
                     bool dirty = vn->rxPacketOffset > 0;
                     const char *status;
 
@@ -933,6 +935,7 @@ Device::rxKick()
                             i, status, vn->rxUnique,
                             rxFifo.countPacketsBefore(vn->rxIndex),
                             vn->rxIndex->slack);
+#endif
                 } else if (busy) {
                     DPRINTF(EthernetSM, "vnic %d unmapped (rxunique %d)\n",
                             i, vn->rxUnique);

diff --git a/src/dev/sparc/mm_disk.cc b/src/dev/sparc/mm_disk.cc
index 1921f6d96af60447e7e3e65c2d55ae40f8218b5f..0095d9f1dfa7cca30d9d5a607af2533f521cff6e 100644 (file)
--- a/src/dev/sparc/mm_disk.cc
+++ b/src/dev/sparc/mm_disk.cc
@@ -56,7 +56,6 @@ MmDisk::read(PacketPtr pkt)
 {
     Addr accessAddr;
     off_t sector;
-    off_t bytes_read;
     uint16_t d16;
     uint32_t d32;
     uint64_t d64;
@@ -68,10 +67,16 @@ MmDisk::read(PacketPtr pkt)
 
     if (sector != curSector) {
         if (dirty) {
-            bytes_read = image->write(diskData, curSector);
-            assert(bytes_read == SectorSize);
+#ifndef NDEBUG
+            off_t bytes_written =
+#endif
+                image->write(diskData, curSector);
+            assert(bytes_written == SectorSize);
         }
-        bytes_read = image->read(diskData,  sector);
+#ifndef NDEBUG
+        off_t bytes_read =
+#endif
+            image->read(diskData, sector);
         assert(bytes_read == SectorSize);
         curSector = sector;
     }
@@ -109,7 +114,6 @@ MmDisk::write(PacketPtr pkt)
 {
     Addr accessAddr;
     off_t sector;
-    off_t bytes_read;
     uint16_t d16;
     uint32_t d32;
     uint64_t d64;
@@ -121,10 +125,16 @@ MmDisk::write(PacketPtr pkt)
 
     if (sector != curSector) {
         if (dirty) {
-            bytes_read = image->write(diskData, curSector);
-            assert(bytes_read == SectorSize);
+#ifndef NDEBUG
+            off_t bytes_written =
+#endif
+                image->write(diskData, curSector);
+            assert(bytes_written == SectorSize);
         }
-        bytes_read = image->read(diskData,  sector);
+#ifndef NDEBUG
+        off_t bytes_read =
+#endif
+            image->read(diskData,  sector);
         assert(bytes_read == SectorSize);
         curSector = sector;
     }
@@ -164,9 +174,11 @@ MmDisk::serialize(std::ostream &os)
 {
     // just write any dirty changes to the cow layer it will take care of
     // serialization
-    int bytes_read;
     if (dirty) {
-        bytes_read = image->write(diskData, curSector);
+#ifndef NDEBUG
+        int bytes_read =
+#endif
+            image->write(diskData, curSector);
         assert(bytes_read == SectorSize);
     }
 }

diff --git a/src/dev/terminal.cc b/src/dev/terminal.cc
index 74d5ddde74457a73f5e1ba547b1d84d4cf2779a1..a11d45554eaa4716b159946410d3f2d3d51c5497 100644 (file)
--- a/src/dev/terminal.cc
+++ b/src/dev/terminal.cc
@@ -259,17 +259,13 @@ Terminal::write(const uint8_t *buf, size_t len)
 uint8_t
 Terminal::in()
 {
-    bool empty;
     uint8_t c;
 
-    empty = rxbuf.empty();
-    assert(!empty);
+    assert(!rxbuf.empty());
     rxbuf.read((char *)&c, 1);
-    empty = rxbuf.empty();
-
 
     DPRINTF(TerminalVerbose, "in: \'%c\' %#02x more: %d\n",
-            isprint(c) ? c : ' ', c, !empty);
+            isprint(c) ? c : ' ', c, !rxbuf.empty());
 
     return c;
 }

diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index 7622c2d4882302f3e5a413614c02fae287d42784..ce3448c4c912638a10990709e534252b7e548b08 100644 (file)
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -93,9 +93,7 @@ PageTable::remap(Addr vaddr, int64_t size, Addr new_vaddr)
             new_vaddr, size);
 
     for (; size > 0; size -= pageSize, vaddr += pageSize, new_vaddr += pageSize) {
-        PTableItr iter = pTable.find(vaddr);
-
-        assert(iter != pTable.end());
+        assert(pTable.find(vaddr) != pTable.end());
 
         pTable[new_vaddr] = pTable[vaddr];
         pTable.erase(vaddr);
@@ -112,9 +110,7 @@ PageTable::unmap(Addr vaddr, int64_t size)
     DPRINTF(MMU, "Unmapping page: %#x-%#x\n", vaddr, vaddr+ size);
 
     for (; size > 0; size -= pageSize, vaddr += pageSize) {
-        PTableItr iter = pTable.find(vaddr);
-
-        assert(iter != pTable.end());
+        assert(pTable.find(vaddr) != pTable.end());
 
         pTable.erase(vaddr);
     }

diff --git a/src/mem/ruby/system/SConscript b/src/mem/ruby/system/SConscript
index 4cf0b31adc9cfe353cd6ea571f004feb75f26789..66d7d95bb5550fdbe952691eb095380b36d98654 100644 (file)
--- a/src/mem/ruby/system/SConscript
+++ b/src/mem/ruby/system/SConscript
@@ -49,6 +49,6 @@ Source('WireBuffer.cc')
 Source('MemoryNode.cc')
 Source('PersistentTable.cc')
 Source('RubyPort.cc')
-Source('Sequencer.cc', Werror=False)
+Source('Sequencer.cc')
 Source('System.cc')
 Source('TimerTable.cc')

diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index 9010178bed7a719742aa330a88f663380c8e8fea..7137dcc280b32aa9bac6f5255bbb82794dd73b96 100644 (file)
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -221,10 +221,8 @@ Sequencer::printConfig(ostream& out) const
 RequestStatus
 Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
 {
-    int total_outstanding =
-        m_writeRequestTable.size() + m_readRequestTable.size();
-
-    assert(m_outstanding_count == total_outstanding);
+    assert(m_outstanding_count ==
+        (m_writeRequestTable.size() + m_readRequestTable.size()));
 
     // See if we should schedule a deadlock check
     if (deadlockCheckEvent.scheduled() == false) {
@@ -285,8 +283,8 @@ Sequencer::insertRequest(PacketPtr pkt, RubyRequestType request_type)
     }
 
     g_system_ptr->getProfiler()->sequencerRequests(m_outstanding_count);
-    total_outstanding = m_writeRequestTable.size() + m_readRequestTable.size();
-    assert(m_outstanding_count == total_outstanding);
+    assert(m_outstanding_count ==
+        (m_writeRequestTable.size() + m_readRequestTable.size()));
 
     return RequestStatus_Ready;
 }

diff --git a/src/mem/slicc/ast/PeekStatementAST.py b/src/mem/slicc/ast/PeekStatementAST.py
index cc3091c8a245d111fb2266c9a458b112eceddf62..a9816bd3d89ca718fbad313b7e302e57f5c5e739 100644 (file)
--- a/src/mem/slicc/ast/PeekStatementAST.py
+++ b/src/mem/slicc/ast/PeekStatementAST.py
@@ -60,7 +60,7 @@ class PeekStatementAST(StatementAST):
         code('''
 {
     // Declare message
-    const $mtid* in_msg_ptr;
+    const $mtid* in_msg_ptr M5_VAR_USED;
     in_msg_ptr = dynamic_cast<const $mtid *>(($qcode).${{self.method}}());
     assert(in_msg_ptr != NULL); // Check the cast result
 ''')

diff --git a/src/mem/slicc/symbols/StateMachine.py b/src/mem/slicc/symbols/StateMachine.py
index 4d3618093429af9b4fac7e684f133d48fc0fd544..e946e5205dd9b0d55ea72ce8787c8343448d181f 100644 (file)
--- a/src/mem/slicc/symbols/StateMachine.py
+++ b/src/mem/slicc/symbols/StateMachine.py
@@ -411,6 +411,7 @@ void unset_tbe(${{self.TBEType.c_ident}}*& m_tbe_ptr);
 #include <sstream>
 #include <string>
 
+#include "base/compiler.hh"
 #include "base/cprintf.hh"
 #include "debug/RubyGenerated.hh"
 #include "debug/RubySlicc.hh"