+2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
+ decide whether to prevent some libgcc routines being included for some
+ multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
+ link between this condition and the one in
+ libgcc/config/arm/lib1func.S.
+
2016-07-07 Richard Biener <rguenther@suse.de>
* tree-ssa-pre.c: Include alias.h.
while (0)
/* Horrible hack: We want to prevent some libgcc routines being included
- for some multilibs. */
-#ifndef __ARM_ARCH_6M__
+ for some multilibs. The condition should match the one in
+ libgcc/config/arm/lib1funcs.S. */
+#if __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1
#undef L_fixdfsi
#undef L_fixunsdfsi
#undef L_truncdfsf2
+2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
+ __ARM_ARCH_ISA_ARM to test for Cortex-M devices.
+
2016-07-06 Segher Boessenkool <segher@kernel.crashing.org>
PR target/70098
return 0
}
return [check_no_compiler_messages arm_cortex_m assembly {
- #if !defined(__ARM_ARCH_7M__) \
- && !defined (__ARM_ARCH_7EM__) \
- && !defined (__ARM_ARCH_6M__)
- #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
+ #if defined(__ARM_ARCH_ISA_ARM)
+ #error __ARM_ARCH_ISA_ARM is defined
#endif
int i;
} "-mthumb"]
+2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
+ * config/arm/bpabi-v6m.S: Clarify what architectures is the
+ implementation suitable for.
+ * config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
+ for all Thumb-1 only targets.
+ (NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
+ (THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
+ __ARM_ARCH_6M__.
+ (EQUIV): Likewise.
+ (ARM_FUNC_ALIAS): Likewise.
+ (umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
+ version.
+ (modsi3): Likewise.
+ (clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
+ (clzdi2): Likewise.
+ (ctzsi2): Likewise.
+ (L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
+ __ARM_ARCH_6M__ in guard for checking whether it is defined.
+ (final includes): Test for NOT_ISA_TARGET_32BIT rather than
+ __ARM_ARCH_6M__ and add comment to indicate the connection between
+ this condition and the one in gcc/config/arm/elf.h.
+ * config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
+ __ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
+ * config/arm/t-softfp: Likewise.
+
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
-/* Miscellaneous BPABI functions. ARMv6M implementation
+/* Miscellaneous BPABI functions. Thumb-1 implementation, suitable for ARMv4T,
+ ARMv6-M and ARMv8-M Baseline like ISA variants.
Copyright (C) 2006-2016 Free Software Foundation, Inc.
Contributed by CodeSourcery.
&& !defined(__thumb2__) \
&& (!defined(__THUMB_INTERWORK__) \
|| defined (__OPTIMIZE_SIZE__) \
- || defined(__ARM_ARCH_6M__)))
+ || !__ARM_ARCH_ISA_ARM))
# define __prefer_thumb__
#endif
+#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
+#define NOT_ISA_TARGET_32BIT 1
+#endif
+
/* How to return from a function call depends on the architecture variant. */
#if (__ARM_ARCH__ > 4) || defined(__ARM_ARCH_4T__)
#ifdef __ARM_EABI__
.macro THUMB_LDIV0 name signed
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
.ifc \signed, unsigned
cmp r0, #0
beq 1f
#else /* !(__INTERWORKING_STUBS__ || __thumb2__) */
-#ifdef __ARM_ARCH_6M__
+#ifdef NOT_ISA_TARGET_32BIT
#define EQUIV .thumb_set
#else
.macro ARM_FUNC_START name sp_section=
#endif
.endm
-#ifndef __ARM_ARCH_6M__
+#ifndef NOT_ISA_TARGET_32BIT
.macro ARM_FUNC_ALIAS new old
.globl SYM (__\new)
EQUIV SYM (__\new), SYM (__\old)
/* ------------------------------------------------------------------------ */
#ifdef L_umodsi3
-#ifdef __ARM_ARCH_EXT_IDIV__
+#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
ARM_FUNC_START umodsi3
/* ------------------------------------------------------------------------ */
#ifdef L_modsi3
-#if defined(__ARM_ARCH_EXT_IDIV__)
+#if defined(__ARM_ARCH_EXT_IDIV__) && __ARM_ARCH_ISA_THUMB != 1
ARM_FUNC_START modsi3
#endif
#ifdef L_clzsi2
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
FUNC_START clzsi2
mov r1, #28
mov r3, #1
#ifdef L_clzdi2
#if !defined(HAVE_ARM_CLZ)
-# if defined(__ARM_ARCH_6M__)
+# ifdef NOT_ISA_TARGET_32BIT
FUNC_START clzdi2
push {r4, lr}
# else
bl __clzsi2
# endif
2:
-# if defined(__ARM_ARCH_6M__)
+# ifdef NOT_ISA_TARGET_32BIT
pop {r4, pc}
# else
RETLDM r4
#endif /* L_clzdi2 */
#ifdef L_ctzsi2
-#if defined(__ARM_ARCH_6M__)
+#ifdef NOT_ISA_TARGET_32BIT
FUNC_START ctzsi2
neg r1, r0
and r0, r0, r1
/* Don't bother with the old interworking routines for Thumb-2. */
/* ??? Maybe only omit these on "m" variants. */
-#if !defined(__thumb2__) && !defined(__ARM_ARCH_6M__)
+#if !defined(__thumb2__) && __ARM_ARCH_ISA_ARM
#if defined L_interwork_call_via_rX
.endm
#ifndef __symbian__
-#ifndef __ARM_ARCH_6M__
+/* The condition here must match the one in gcc/config/arm/elf.h. */
+#ifndef NOT_ISA_TARGET_32BIT
#include "ieee754-df.S"
#include "ieee754-sf.S"
#include "bpabi.S"
-#else /* __ARM_ARCH_6M__ */
+#else /* NOT_ISA_TARGET_32BIT */
#include "bpabi-v6m.S"
-#endif /* __ARM_ARCH_6M__ */
+#endif /* NOT_ISA_TARGET_32BIT */
#endif /* !__symbian__ */
#endif
#endif
-#ifdef __ARM_ARCH_6M__
+#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1
/* r0 points to a 16-word block. Upload these values to the actual core
state. */
UNPREFIX \name
.endm
-#else /* !__ARM_ARCH_6M__ */
+#else /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
/* r0 points to a 16-word block. Upload these values to the actual core
state. */
UNPREFIX \name
.endm
-#endif /* !__ARM_ARCH_6M__ */
+#endif /* __ARM_ARCH_ISA_ARM || __ARM_ARCH_ISA_THUMB != 1 */
UNWIND_WRAPPER _Unwind_RaiseException 1
UNWIND_WRAPPER _Unwind_Resume 1
-softfp_wrap_start := '\#ifdef __ARM_ARCH_6M__'
+softfp_wrap_start := '\#if !__ARM_ARCH_ISA_ARM && __ARM_ARCH_ISA_THUMB == 1'
softfp_wrap_end := '\#endif'