+2011-05-01 Anatoly Sokolov <aesok@post.ru>
+
+ * reginfo.c (memory_move_cost): Change rclass argument type form
+ 'enum reg_class' to reg_class_t.
+ * reload.h (memory_move_cost): Update prototype.
+ * postreload.c reload_cse_simplify_set): Change type dclass var to
+ reg_class_t.
+ * ira-int.h (ira_allocate_cost_vector, ira_free_cost_vector):
+ Update prototype.
+ (ira_allocate_and_set_costs): Change aclass argument type form
+ 'enum reg_class' to reg_class_t.
+ * ira-build.c (ira_allocate_cost_vector, ira_free_cost_vector):
+ Change aclass argument type to reg_class_t.
+ (update_conflict_hard_reg_costs): Change type aclass and pref vars
+ to reg_class_t.
+ * gcc/ira.c (setup_class_subset_and_memory_move_costs): Adjust
+ memory_move_cost call.
+
+ * config/ia64/ia64.c (ia64_register_move_cost): Remove 'from' and
+ 'to' local var. Rename from_i and to_i arguments to 'from' and 'to'.
+ Change type tmp var to reg_class_t.
+
2011-04-30 Jan Hubicka <jh@suse.cz>
* ipa-inline.c (can_inline_edge_p): Disregard limits when
one in class TO, using MODE. */
static int
-ia64_register_move_cost (enum machine_mode mode, reg_class_t from_i,
- reg_class_t to_i)
+ia64_register_move_cost (enum machine_mode mode, reg_class_t from,
+ reg_class_t to)
{
- enum reg_class from = (enum reg_class) from_i;
- enum reg_class to = (enum reg_class) to_i;
-
/* ADDL_REGS is the same as GR_REGS for movement purposes. */
if (to == ADDL_REGS)
to = GR_REGS;
lower number class as the destination. */
if (from < to)
{
- enum reg_class tmp = to;
+ reg_class_t tmp = to;
to = from, from = tmp;
}
/* Allocate and return a cost vector VEC for ACLASS. */
int *
-ira_allocate_cost_vector (enum reg_class aclass)
+ira_allocate_cost_vector (reg_class_t aclass)
{
- return (int *) pool_alloc (cost_vector_pool[aclass]);
+ return (int *) pool_alloc (cost_vector_pool[(int) aclass]);
}
/* Free a cost vector VEC for ACLASS. */
void
-ira_free_cost_vector (int *vec, enum reg_class aclass)
+ira_free_cost_vector (int *vec, reg_class_t aclass)
{
ira_assert (vec != NULL);
- pool_free (cost_vector_pool[aclass], vec);
+ pool_free (cost_vector_pool[(int) aclass], vec);
}
/* Finish work with hard register cost vectors. Release allocation
FOR_EACH_ALLOCNO (a, ai)
{
- enum reg_class aclass = ALLOCNO_CLASS (a);
- enum reg_class pref = reg_preferred_class (ALLOCNO_REGNO (a));
+ reg_class_t aclass = ALLOCNO_CLASS (a);
+ reg_class_t pref = reg_preferred_class (ALLOCNO_REGNO (a));
- if (reg_class_size[pref] != 1)
+ if (reg_class_size[(int) pref] != 1)
continue;
- index = ira_class_hard_reg_index[aclass][ira_class_hard_regs[pref][0]];
+ index = ira_class_hard_reg_index[(int) aclass]
+ [ira_class_hard_regs[(int) pref][0]];
if (index < 0)
continue;
if (ALLOCNO_CONFLICT_HARD_REG_COSTS (a) == NULL
|| ALLOCNO_HARD_REG_COSTS (a) == NULL)
continue;
min = INT_MAX;
- for (i = ira_class_hard_regs_num[aclass] - 1; i >= 0; i--)
+ for (i = ira_class_hard_regs_num[(int) aclass] - 1; i >= 0; i--)
if (ALLOCNO_HARD_REG_COSTS (a)[i] > ALLOCNO_CLASS_COST (a)
&& min > ALLOCNO_HARD_REG_COSTS (a)[i])
min = ALLOCNO_HARD_REG_COSTS (a)[i];
extern ira_copy_t ira_add_allocno_copy (ira_allocno_t, ira_allocno_t, int,
bool, rtx, ira_loop_tree_node_t);
-extern int *ira_allocate_cost_vector (enum reg_class);
-extern void ira_free_cost_vector (int *, enum reg_class);
+extern int *ira_allocate_cost_vector (reg_class_t);
+extern void ira_free_cost_vector (int *, reg_class_t);
extern void ira_flattening (int, int);
extern bool ira_build (bool);
/* Allocate cost vector *VEC for hard registers of ACLASS and
initialize the elements by VAL if it is necessary */
static inline void
-ira_allocate_and_set_costs (int **vec, enum reg_class aclass, int val)
+ira_allocate_and_set_costs (int **vec, reg_class_t aclass, int val)
{
int i, *reg_costs;
int len;
if (*vec != NULL)
return;
*vec = reg_costs = ira_allocate_cost_vector (aclass);
- len = ira_class_hard_regs_num[aclass];
+ len = ira_class_hard_regs_num[(int) aclass];
for (i = 0; i < len; i++)
reg_costs[i] = val;
}
ira_max_memory_move_cost[mode][cl][0]
= ira_memory_move_cost[mode][cl][0]
= memory_move_cost ((enum machine_mode) mode,
- (enum reg_class) cl, false);
+ (reg_class_t) cl, false);
ira_max_memory_move_cost[mode][cl][1]
= ira_memory_move_cost[mode][cl][1]
= memory_move_cost ((enum machine_mode) mode,
- (enum reg_class) cl, true);
+ (reg_class_t) cl, true);
/* Costs for NO_REGS are used in cost calculation on the
1st pass when the preferred register classes are not
known yet. In this case we take the best scenario. */
int did_change = 0;
int dreg;
rtx src;
- enum reg_class dclass;
+ reg_class_t dclass;
int old_cost;
cselib_val *val;
struct elt_loc_list *l;
}
/* Compute cost of moving registers to/from memory. */
+
int
-memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in)
+memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
{
return targetm.memory_move_cost (mode, rclass, in);
}
#endif
extern int register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
-extern int memory_move_cost (enum machine_mode, enum reg_class, bool);
+extern int memory_move_cost (enum machine_mode, reg_class_t, bool);
extern int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool);
/* Maximum number of reloads we can need. */