#
# Authors: Ali Saidi
# Gabe Black
+# William Wang
from m5.params import *
from m5.proxy import *
clock1 = Param.Clock('1MHz', "Clock speed of the input")
amba_id = 0x00141804
+class Pl050(AmbaDevice):
+ type = 'Pl050'
+ gic = Param.Gic(Parent.any, "Gic to use for interrupting")
+ int_num = Param.UInt32("Interrupt number that connects to GIC")
+ int_delay = Param.Latency("100ns", "Time between action and interrupt generation by UART")
+ amba_id = 0x00141050
+
class Pl111(AmbaDmaDevice):
type = 'Pl111'
clock = Param.Clock('24MHz', "Clock speed of the input")
timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
clcd = Pl111(pio_addr=0x10020000, int_num=55)
+ kmi0 = Pl050(pio_addr=0x10006000, int_num=52)
+ kmi1 = Pl050(pio_addr=0x10007000, int_num=53)
l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff)
flash_fake = IsaFake(pio_addr=0x40000000, pio_size=0x4000000)
sci_fake = AmbaFake(pio_addr=0x1000e000)
aaci_fake = AmbaFake(pio_addr=0x10004000)
mmc_fake = AmbaFake(pio_addr=0x10005000)
- kmi0_fake = AmbaFake(pio_addr=0x10006000)
- kmi1_fake = AmbaFake(pio_addr=0x10007000)
rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
self.timer0.pio = bus.port
self.timer1.pio = bus.port
self.clcd.pio = bus.port
+ self.kmi0.pio = bus.port
+ self.kmi1.pio = bus.port
self.dmac_fake.pio = bus.port
self.uart1_fake.pio = bus.port
self.uart2_fake.pio = bus.port
self.sci_fake.pio = bus.port
self.aaci_fake.pio = bus.port
self.mmc_fake.pio = bus.port
- self.kmi0_fake.pio = bus.port
- self.kmi1_fake.pio = bus.port
self.rtc_fake.pio = bus.port
self.flash_fake.pio = bus.port
-# Interrupt numbers are wrong here
+# Reference for memory map and interrupt number
+# RealView Emulation Baseboard User Guide (ARM DUI 0143B)
+# Chapter 4: Programmer's Reference
class RealViewEB(RealView):
uart = Pl011(pio_addr=0x10009000, int_num=44)
realview_io = RealViewCtrl(pio_addr=0x10000000)
gic = Gic(dist_addr=0x10041000, cpu_addr=0x10040000)
timer0 = Sp804(int_num0=36, int_num1=36, pio_addr=0x10011000)
timer1 = Sp804(int_num0=37, int_num1=37, pio_addr=0x10012000)
- clcd = Pl111(pio_addr=0x10020000, int_num=55)
+ clcd = Pl111(pio_addr=0x10020000, int_num=23)
+ kmi0 = Pl050(pio_addr=0x10006000, int_num=20)
+ kmi1 = Pl050(pio_addr=0x10007000, int_num=21)
l2x0_fake = IsaFake(pio_addr=0x1f002000, pio_size=0xfff, warn_access="1")
dmac_fake = AmbaFake(pio_addr=0x10030000)
sci_fake = AmbaFake(pio_addr=0x1000e000)
aaci_fake = AmbaFake(pio_addr=0x10004000)
mmc_fake = AmbaFake(pio_addr=0x10005000)
- kmi0_fake = AmbaFake(pio_addr=0x10006000)
- kmi1_fake = AmbaFake(pio_addr=0x10007000)
rtc_fake = AmbaFake(pio_addr=0x10017000, amba_id=0x41031)
self.timer0.pio = bus.port
self.timer1.pio = bus.port
self.clcd.pio = bus.port
+ self.kmi0.pio = bus.port
+ self.kmi1.pio = bus.port
self.dmac_fake.pio = bus.port
self.uart1_fake.pio = bus.port
self.uart2_fake.pio = bus.port
self.sci_fake.pio = bus.port
self.aaci_fake.pio = bus.port
self.mmc_fake.pio = bus.port
- self.kmi0_fake.pio = bus.port
- self.kmi1_fake.pio = bus.port
self.rtc_fake.pio = bus.port
Source('gic.cc')
Source('pl011.cc')
Source('pl111.cc')
+ Source('kmi.cc')
Source('timer_sp804.cc')
Source('rv_ctrl.cc')
Source('realview.cc')
TraceFlag('AMBA')
TraceFlag('PL111')
+ TraceFlag('Pl050')
TraceFlag('GIC')
--- /dev/null
+/*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Copyright (c) 2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: William Wang
+ */
+
+#include "base/trace.hh"
+#include "dev/arm/amba_device.hh"
+#include "dev/arm/kmi.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
+
+Pl050::Pl050(const Params *p)
+ : AmbaDevice(p), control(0x00), status(0x43), kmidata(0x00), clkdiv(0x00),
+ intreg(0x00), intNum(p->int_num), gic(p->gic), intDelay(p->int_delay),
+ intEvent(this)
+{
+ pioSize = 0xfff;
+}
+
+Tick
+Pl050::read(PacketPtr pkt)
+{
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+ Addr daddr = pkt->getAddr() - pioAddr;
+ pkt->allocate();
+
+ DPRINTF(Pl050, " read register %#x size=%d\n", daddr, pkt->getSize());
+
+ // use a temporary data since the KMI registers are read/written with
+ // different size operations
+ //
+ uint32_t data = 0;
+
+ switch (daddr) {
+ case kmiCr:
+ data = control;
+ break;
+ case kmiStat:
+ data = status;
+ break;
+ case kmiData:
+ data = kmidata;
+ break;
+ case kmiClkDiv:
+ data = clkdiv;
+ break;
+ case kmiISR:
+ data = intreg;
+ break;
+ default:
+ if (AmbaDev::readId(pkt, ambaId, pioAddr)) {
+ // Hack for variable size accesses
+ data = pkt->get<uint32_t>();
+ break;
+ }
+
+ warn("Tried to read PL050 at offset %#x that doesn't exist\n", daddr);
+ break;
+ }
+
+ switch(pkt->getSize()) {
+ case 1:
+ pkt->set<uint8_t>(data);
+ break;
+ case 2:
+ pkt->set<uint16_t>(data);
+ break;
+ case 4:
+ pkt->set<uint32_t>(data);
+ break;
+ default:
+ panic("KMI read size too big?\n");
+ break;
+ }
+
+ pkt->makeAtomicResponse();
+ return pioDelay;
+}
+
+Tick
+Pl050::write(PacketPtr pkt)
+{
+
+ assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+
+ Addr daddr = pkt->getAddr() - pioAddr;
+
+ DPRINTF(Pl050, " write register %#x value %#x size=%d\n", daddr,
+ pkt->get<uint8_t>(), pkt->getSize());
+
+ // use a temporary data since the KMI registers are read/written with
+ // different size operations
+ //
+ uint32_t data = 0;
+
+ switch (pkt->getSize()) {
+ case 1:
+ data = pkt->get<uint8_t>();
+ break;
+ case 2:
+ data = pkt->get<uint16_t>();
+ break;
+ case 4:
+ data = pkt->get<uint32_t>();
+ break;
+ default:
+ panic("KMI write size too big?\n");
+ break;
+ }
+
+
+ switch (daddr) {
+ case kmiCr:
+ control = data;
+ break;
+ case kmiStat:
+ panic("Tried to write PL050 register(read only) at offset %#x\n",
+ daddr);
+ break;
+ case kmiData:
+ kmidata = data;
+ break;
+ case kmiClkDiv:
+ clkdiv = data;
+ break;
+ case kmiISR:
+ panic("Tried to write PL050 register(read only) at offset %#x\n",
+ daddr);
+ break;
+ default:
+ warn("Tried to write PL050 at offset %#x that doesn't exist\n", daddr);
+ break;
+ }
+ pkt->makeAtomicResponse();
+ return pioDelay;
+}
+
+void
+Pl050::generateInterrupt()
+{
+ if (intreg.rxintr || intreg.txintr) {
+ gic->sendInt(intNum);
+ DPRINTF(Pl050, " -- Generated\n");
+ }
+}
+
+Pl050 *
+Pl050Params::create()
+{
+ return new Pl050(this);
+}
--- /dev/null
+/*
+ * Copyright (c) 2010 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Copyright (c) 2005 The Regents of The University of Michigan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: William Wang
+ */
+
+
+/** @file
+ * Implementiation of a PL050 KMI
+ */
+
+#ifndef __DEV_ARM_PL050_HH__
+#define __DEV_ARM_PL050_HH__
+
+#include "base/range.hh"
+#include "dev/io_device.hh"
+#include "params/Pl050.hh"
+
+class Gic;
+
+class Pl050 : public AmbaDevice
+{
+ protected:
+ static const int kmiCr = 0x000;
+ static const int kmiStat = 0x004;
+ static const int kmiData = 0x008;
+ static const int kmiClkDiv = 0x00C;
+ static const int kmiISR = 0x010;
+
+ // control register
+ uint8_t control;
+
+ // status register
+ uint8_t status;
+
+ // received data (read) or data to be transmitted (write)
+ uint8_t kmidata;
+
+ // clock divisor register
+ uint8_t clkdiv;
+
+ BitUnion8(IntReg)
+ Bitfield<0> txintr;
+ Bitfield<1> rxintr;
+ EndBitUnion(IntReg)
+
+ /** interrupt mask register. */
+ IntReg intreg;
+
+ /** Interrupt number to generate */
+ int intNum;
+
+ /** Gic to use for interrupting */
+ Gic *gic;
+
+ /** Delay before interrupting */
+ Tick intDelay;
+
+ /** Function to generate interrupt */
+ void generateInterrupt();
+
+ /** Wrapper to create an event out of the thing */
+ EventWrapper<Pl050, &Pl050::generateInterrupt> intEvent;
+
+ public:
+ typedef Pl050Params Params;
+ const Params *
+ params() const
+ {
+ return dynamic_cast<const Params *>(_params);
+ }
+
+ Pl050(const Params *p);
+
+ virtual Tick read(PacketPtr pkt);
+ virtual Tick write(PacketPtr pkt);
+
+ /**
+ * Return if we have an interrupt pending
+ * @return interrupt status
+ * @todo fix me when implementation improves
+ */
+ virtual bool intStatus() { return false; }
+};
+
+#endif
projects / gem5.git / commitdiff