static bool amdgpu_get_new_ib(struct radeon_winsys *ws, struct amdgpu_cs *cs,
enum ib_type ib_type)
{
- struct amdgpu_winsys *aws = (struct amdgpu_winsys*)ws;
+ struct amdgpu_winsys *aws = amdgpu_winsys(ws);
/* Small IBs are better than big IBs, because the GPU goes idle quicker
* and there is less waiting for buffers and fences. Proof:
* http://www.phoronix.com/scan.php?page=article&item=mesa-111-si&num=1
static void amdgpu_winsys_destroy(struct radeon_winsys *rws)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
if (ws->reserve_vmid)
amdgpu_vm_unreserve_vmid(ws->dev, 0);
static void amdgpu_winsys_query_info(struct radeon_winsys *rws,
struct radeon_info *info)
{
- *info = ((struct amdgpu_winsys *)rws)->info;
+ *info = amdgpu_winsys(rws)->info;
}
static bool amdgpu_cs_request_feature(struct radeon_cmdbuf *rcs,
static uint64_t amdgpu_query_value(struct radeon_winsys *rws,
enum radeon_value_id value)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
struct amdgpu_heap_info heap;
uint64_t retval = 0;
unsigned reg_offset,
unsigned num_registers, uint32_t *out)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
return amdgpu_read_mm_registers(ws->dev, reg_offset / 4, num_registers,
0xffffffff, 0, out) == 0;
static bool amdgpu_winsys_unref(struct radeon_winsys *rws)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
bool destroy;
/* When the reference counter drops to zero, remove the device pointer
static void amdgpu_pin_threads_to_L3_cache(struct radeon_winsys *rws,
unsigned cache)
{
- struct amdgpu_winsys *ws = (struct amdgpu_winsys*)rws;
+ struct amdgpu_winsys *ws = amdgpu_winsys(rws);
util_pin_thread_to_L3(ws->cs_queue.threads[0], cache,
util_cpu_caps.cores_per_L3);