aarch64.md (mov<mode>): Change.

2017-08-11  Tamar Christina  <tamar.christina@arm.com>
	* config/aarch64/aarch64.md (mov<mode>): Change.
	(*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
	aarch64_reg_or_fp_float into aarch64_reg_or_fp_zero.
	* config/aarch64/predicates.md (aarch64_reg_or_fp_float): Removed.

From-SVN: r251051

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 94fb7f805aaf804d6e7563054593dcb72a0f214c..32f06a035f030b476435d531cf35e507fefc6f32 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2017-08-11  Tamar Christina  <tamar.christina@arm.com>
+       * config/aarch64/aarch64.md (mov<mode>): Change.
+       (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
+       aarch64_reg_or_fp_float into aarch64_reg_or_fp_zero.
+       * config/aarch64/predicates.md (aarch64_reg_or_fp_float): Removed.
+
 2017-08-11  Eric Botcazou  <ebotcazou@adacore.com>
 
        * tree-sra.c (build_access_from_expr_1): Use more precise diagnostics

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index b1ef0252c4b0b93d368abbd9bb88cb740115a829..64b60a903ed7c0090298989333894442a277ccd4 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1077,7 +1077,7 @@
   [(set (match_operand:HF 0 "nonimmediate_operand" "=w,w  ,?r,w,w  ,w  ,w,m,r,m ,r")
        (match_operand:HF 1 "general_operand"      "Y ,?rY, w,w,Ufc,Uvi,m,w,m,rY,r"))]
   "TARGET_FLOAT && (register_operand (operands[0], HFmode)
-    || aarch64_reg_or_fp_float (operands[1], HFmode))"
+    || aarch64_reg_or_fp_zero (operands[1], HFmode))"
   "@
    movi\\t%0.4h, #0
    fmov\\t%h0, %w1
@@ -1100,7 +1100,7 @@
   [(set (match_operand:SF 0 "nonimmediate_operand" "=w,w  ,?r,w,w  ,w  ,w,m,r,m ,r,r")
        (match_operand:SF 1 "general_operand"      "Y ,?rY, w,w,Ufc,Uvi,m,w,m,rY,r,M"))]
   "TARGET_FLOAT && (register_operand (operands[0], SFmode)
-    || aarch64_reg_or_fp_float (operands[1], SFmode))"
+    || aarch64_reg_or_fp_zero (operands[1], SFmode))"
   "@
    movi\\t%0.2s, #0
    fmov\\t%s0, %w1
@@ -1124,7 +1124,7 @@
   [(set (match_operand:DF 0 "nonimmediate_operand" "=w, w  ,?r,w,w  ,w  ,w,m,r,m ,r,r")
        (match_operand:DF 1 "general_operand"      "Y , ?rY, w,w,Ufc,Uvi,m,w,m,rY,r,N"))]
   "TARGET_FLOAT && (register_operand (operands[0], DFmode)
-    || aarch64_reg_or_fp_float (operands[1], DFmode))"
+    || aarch64_reg_or_fp_zero (operands[1], DFmode))"
   "@
    movi\\t%d0, #0
    fmov\\t%d0, %x1

diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md
index 95d28cfa33c6e06c47b6c666af6d8c2d6cef20f4..11243c4ce00aa7d16a886bb24b01180801c68f4e 100644 (file)
--- a/gcc/config/aarch64/predicates.md
+++ b/gcc/config/aarch64/predicates.md
@@ -57,11 +57,6 @@
        (ior (match_operand 0 "register_operand")
            (match_test "op == const0_rtx"))))
 
-(define_predicate "aarch64_reg_or_fp_float"
-  (ior (match_operand 0 "register_operand")
-       (and (match_code "const_double")
-            (match_test "aarch64_float_const_rtx_p (op)"))))
-
 (define_predicate "aarch64_reg_or_fp_zero"
   (ior (match_operand 0 "register_operand")
        (and (match_code "const_double")