sel.nir = program->ir.nir;
si_nir_scan_shader(sel.nir, &sel.info);
- si_lower_nir(&sel);
+ si_lower_nir(&sel, program->compiler_ctx_state.chip_class);
}
void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
const struct tgsi_shader_info *info,
struct tgsi_tessctrl_info *out);
-void si_lower_nir(struct si_shader_selector *sel);
+void si_lower_nir(struct si_shader_selector *sel, enum chip_class chip_class);
/* Inline helpers. */
* selector is created.
*/
void
-si_lower_nir(struct si_shader_selector* sel)
+si_lower_nir(struct si_shader_selector* sel, enum chip_class chip_class)
{
/* Adjust the driver location of inputs and outputs. The state tracker
* interprets them as slots, while the ac/nir backend interprets them
};
NIR_PASS_V(sel->nir, nir_lower_subgroups, &subgroups_options);
+ ac_lower_indirect_derefs(sel->nir, chip_class);
+
bool progress;
do {
progress = false;
si_nir_scan_shader(sel->nir, &sel->info);
si_nir_scan_tess_ctrl(sel->nir, &sel->info, &sel->tcs_info);
- si_lower_nir(sel);
+ si_lower_nir(sel, sctx->b.chip_class);
}
sel->type = sel->info.processor;