simplify-rtx.c (simplify_binary_operation): Unfactor the shift and rotate cases.

	* simplify-rtx.c (simplify_binary_operation): Unfactor the shift
	and rotate cases.
	<LSHIFTRT>: Optimize (lshiftrt (clz X) C) as (eq X 0) where C is
	log2(GET_MODE_BITSIZE(X)) on targets with the appropriate semantics.

	* gcc.target/ppc-eq0-1.c: New test case.
	* gcc.target/ppc-negeq0-1.c: New test case.

From-SVN: r114239

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9cb3befcafc2ff15441173a55530903f0e733d49..4586d99d1402e9d6dda9d3dd8cf25de53391726a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2006-05-30  Roger Sayle  <roger@eyesopen.com>
+
+       * simplify-rtx.c (simplify_binary_operation): Unfactor the shift
+       and rotate cases.
+       <LSHIFTRT>: Optimize (lshiftrt (clz X) C) as (eq X 0) where C is
+       log2(GET_MODE_BITSIZE(X)) on targets with the appropriate semantics.
+
 2006-05-30  Dirk Mueller  <dmueller@suse.de>
 
        PR c/27273

diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index c51ca9e701725610800a5518f79db4f984e04ca7..65b1d193d42bfc4534132ee53d0b8e24511056da 100644 (file)
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -2436,21 +2436,45 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
     case ROTATERT:
     case ROTATE:
     case ASHIFTRT:
+      if (trueop1 == CONST0_RTX (mode))
+       return op0;
+      if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
+       return op0;
       /* Rotating ~0 always results in ~0.  */
       if (GET_CODE (trueop0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
          && (unsigned HOST_WIDE_INT) INTVAL (trueop0) == GET_MODE_MASK (mode)
          && ! side_effects_p (op1))
        return op0;
-
-      /* Fall through....  */
+      break;
 
     case ASHIFT:
     case SS_ASHIFT:
+      if (trueop1 == CONST0_RTX (mode))
+       return op0;
+      if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
+       return op0;
+      break;
+
     case LSHIFTRT:
       if (trueop1 == CONST0_RTX (mode))
        return op0;
       if (trueop0 == CONST0_RTX (mode) && ! side_effects_p (op1))
        return op0;
+      /* Optimize (lshiftrt (clz X) C) as (eq X 0).  */
+      if (GET_CODE (op0) == CLZ
+         && GET_CODE (trueop1) == CONST_INT
+         && STORE_FLAG_VALUE == 1
+         && INTVAL (trueop1) < width)
+       {
+         enum machine_mode imode = GET_MODE (XEXP (op0, 0));
+         unsigned HOST_WIDE_INT zero_val = 0;
+
+         if (CLZ_DEFINED_VALUE_AT_ZERO (imode, zero_val)
+             && zero_val == GET_MODE_BITSIZE (imode)
+             && INTVAL (trueop1) == exact_log2 (zero_val))
+           return simplify_gen_relational (EQ, mode, imode,
+                                           XEXP (op0, 0), const0_rtx);
+       }
       break;
 
     case SMIN:

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d5b709419be5285bb0a91a006b6229dfef51e0e7..ecc1cc14f9a835ebdd266ff5c0cffd42fe3d2faf 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-05-30  Roger Sayle  <roger@eyesopen.com>
+
+       * gcc.target/ppc-eq0-1.c: New test case.
+       * gcc.target/ppc-negeq0-1.c: New test case.
+
 2006-05-30  Dirk Mueller  <dmueller@suse.de>
 
        PR c/27273

diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-eq0-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-eq0-1.c
new file mode 100644 (file)
index 0000000..163a4b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-eq0-1.c
@@ -0,0 +1,10 @@
+/* PR rtl-optimization/10588 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int foo(int x)
+{
+  return x == 0;
+}
+
+/* { dg-final { scan-assembler "cntlzw" } } */

diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-negeq0-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-negeq0-1.c
new file mode 100644 (file)
index 0000000..37d10bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-negeq0-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int foo(int x)
+{
+  return -(x == 0);
+}
+
+int bar(int x)
+{
+  int t = __builtin_clz(x);
+  return -(t>>5);
+}
+
+/* { dg-final { scan-assembler-not "cntlzw" } } */