radeonsi: update a comment about cache behavior
authorMarek Olšák <marek.olsak@amd.com>
Thu, 26 Jul 2018 00:21:04 +0000 (20:21 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 26 Jul 2018 05:45:47 +0000 (01:45 -0400)
src/gallium/drivers/radeonsi/si_state_streamout.c

index 8b0dfa5b1168167fe4dcbc32102645c18e871938..fd7e843bc4841da0037eb2209bf9bb036d012617 100644 (file)
@@ -116,9 +116,9 @@ static void si_set_streamout_targets(struct pipe_context *ctx,
                /* Invalidate the scalar cache in case a streamout buffer is
                 * going to be used as a constant buffer.
                 *
-                * Invalidate TC L1, because streamout bypasses it (done by
-                * setting GLC=1 in the store instruction), but it can contain
-                * outdated data of streamout buffers.
+                * Invalidate vL1, because streamout bypasses it (done by
+                * setting GLC=1 in the store instruction), but vL1 in other
+                * CUs can contain outdated data of streamout buffers.
                 *
                 * VS_PARTIAL_FLUSH is required if the buffers are going to be
                 * used as an input immediately.