[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Fri, 1 May 2020 18:33:05 +0000 (18:33 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 1 May 2020 18:33:07 +0000 (19:33 +0100)
91/2cf5f14fed8133e841275c6902d3b66bee48ac [new file with mode: 0644]

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+From: bugzilla-daemon@libre-soc.org
+To: libre-riscv-dev@lists.libre-riscv.org
+Date: Fri, 01 May 2020 18:33:05 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
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+Message-ID: <bug-296-13-sah0KK5cwC@https.bugs.libre-soc.org/>
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+Auto-Submitted: auto-generated
+MIME-Version: 1.0
+Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and
+ register file
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