S/390: Use define_subst for the setmem patterns.

While trying to get rid of the Y constraint in the setmem patterns I
noticed that for these patterns it isn't even a problem since these
always only use the constraint with a Pmode match_operand.  But while
being at it I've tried to fold some of the patterns a bit.

gcc/ChangeLog:

2016-03-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/constraints.md ("jm8"): New constraint.
	* config/s390/predicates.md ("const_int_8bitset_operand"): New predicate.
	* config/s390/s390.md ("*setmem_long", "*setmem_long_and"): Merge
	into ...
	("*setmem_long<setmem_and>"): New pattern.
	("*setmem_long_31z", "*setmem_long_and_31z"): Merge
	into ...
	("*setmem_long_31z<setmem_and>"): New pattern.
	* config/s390/subst.md ("setmem_31z_subst", "setmem_and_subst"):
	New substitution rules with the required attributes.

From-SVN: r233848

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 79756c8a185d5e02cebbbd335722d007938455dc..6c35f0e72628ec42965a75e7e018b37408c9b347 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2016-03-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
+
+       * config/s390/constraints.md ("jm8"): New constraint.
+       * config/s390/predicates.md ("const_int_8bitset_operand"): New predicate.
+       * config/s390/s390.md ("*setmem_long", "*setmem_long_and"): Merge
+       into ...
+       ("*setmem_long<setmem_and>"): New pattern.
+       ("*setmem_long_31z", "*setmem_long_and_31z"): Merge
+       into ...
+       ("*setmem_long_31z<setmem_and>"): New pattern.
+       * config/s390/subst.md ("setmem_31z_subst", "setmem_and_subst"):
+       New substitution rules with the required attributes.
+
 2016-03-01  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
        * config/s390/subst.md (DSI_VI): New mode iterator.

diff --git a/gcc/config/s390/constraints.md b/gcc/config/s390/constraints.md
index 60a7edf8b51060d85c379142d43a6dcca2121485..6eeaa987ca713a832ced51e8772affe82ed8c7b7 100644 (file)
--- a/gcc/config/s390/constraints.md
+++ b/gcc/config/s390/constraints.md
@@ -37,6 +37,7 @@
 ;;         jKK: constant vector with all elements having the same value and
 ;;              matching K constraint
 ;;         jm6: An integer operand with the lowest order 6 bits all ones.
+;;         jm8: An integer operand with the lowest order 8 bits all ones.
 ;;    t -- Access registers 36 and 37.
 ;;    v -- Vector registers v0-v31.
 ;;    C -- A signed 8-bit constant (-128..127)
@@ -420,6 +421,10 @@
   "@internal An integer operand with the lowest order 6 bits all ones."
   (match_operand 0 "const_int_6bitset_operand"))
 
+(define_constraint "jm8"
+  "@internal An integer operand with the lowest order 8 bits all ones."
+  (match_operand 0 "const_int_8bitset_operand"))
+
 ;;
 ;; Memory constraints follow.
 ;;

diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md
index fefefb324745916e8b0cfb926fef4488ae3fa9b4..fbff24d3e559c22b7d982e7eb082c35a311a2cc6 100644 (file)
--- a/gcc/config/s390/predicates.md
+++ b/gcc/config/s390/predicates.md
@@ -119,6 +119,12 @@
 (define_predicate "const_int_6bitset_operand"
  (and (match_code "const_int")
       (match_test "(INTVAL (op) & 63) == 63")))
+
+; An integer operand with the lowest order 8 bits all ones.
+(define_predicate "const_int_8bitset_operand"
+ (and (match_code "const_int")
+      (match_test "(INTVAL (op) & 255) == 255")))
+
 (define_predicate "nonzero_shift_count_operand"
   (and (match_code "const_int")
        (match_test "IN_RANGE (INTVAL (op), 1, GET_MODE_BITSIZE (mode) - 1)")))

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index ca58c42fe4c850c6c43541140f3e1298f53400e7..d085fa1fbd157a04ad134d839116d18c926ad0fd 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -3323,7 +3323,7 @@
 
 ; Patterns for 31 bit + Esa and 64 bit + Zarch.
 
-(define_insn "*setmem_long"
+(define_insn "*setmem_long<setmem_and>"
   [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
    (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
         (unspec:BLK [(match_operand:P 2 "shift_count_or_setmem_operand" "Y")
@@ -3336,26 +3336,10 @@
   [(set_attr "length" "8")
    (set_attr "type" "vs")])
 
-(define_insn "*setmem_long_and"
-  [(clobber (match_operand:<DBL> 0 "register_operand" "=d"))
-   (set (mem:BLK (subreg:P (match_operand:<DBL> 3 "register_operand" "0") 0))
-        (unspec:BLK [(and:P
-                     (match_operand:P 2 "shift_count_or_setmem_operand" "Y")
-                     (match_operand:P 4 "const_int_operand"             "n"))
-                   (subreg:P (match_dup 3) <modesize>)]
-                   UNSPEC_REPLICATE_BYTE))
-   (use (match_operand:<DBL> 1 "register_operand" "d"))
-   (clobber (reg:CC CC_REGNUM))]
-  "(TARGET_64BIT || !TARGET_ZARCH) &&
-   (INTVAL (operands[4]) & 255) == 255"
-  "mvcle\t%0,%1,%Y2\;jo\t.-4"
-  [(set_attr "length" "8")
-   (set_attr "type" "vs")])
-
 ; Variants for 31 bit + Zarch, necessary because of the odd in-register offsets
 ; of the SImode subregs.
 
-(define_insn "*setmem_long_31z"
+(define_insn "*setmem_long_31z<setmem_and>"
   [(clobber (match_operand:TI 0 "register_operand" "=d"))
    (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
         (unspec:BLK [(match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
@@ -3367,21 +3351,6 @@
   [(set_attr "length" "8")
    (set_attr "type" "vs")])
 
-(define_insn "*setmem_long_and_31z"
-  [(clobber (match_operand:TI 0 "register_operand" "=d"))
-   (set (mem:BLK (subreg:SI (match_operand:TI 3 "register_operand" "0") 4))
-        (unspec:BLK [(and:SI
-                     (match_operand:SI 2 "shift_count_or_setmem_operand" "Y")
-                     (match_operand:SI 4 "const_int_operand"             "n"))
-                   (subreg:SI (match_dup 3) 12)] UNSPEC_REPLICATE_BYTE))
-   (use (match_operand:TI 1 "register_operand" "d"))
-   (clobber (reg:CC CC_REGNUM))]
-  "(!TARGET_64BIT && TARGET_ZARCH) &&
-   (INTVAL (operands[4]) & 255) == 255"
-  "mvcle\t%0,%1,%Y2\;jo\t.-4"
-  [(set_attr "length" "8")
-   (set_attr "type" "vs")])
-
 ;
 ; cmpmemM instruction pattern(s).
 ;

diff --git a/gcc/config/s390/subst.md b/gcc/config/s390/subst.md
index 8a1b8145fd00717dca0f71b829d72d7f95aec1a6..886d4201fe7bcfa464cab8afccec4f4106dfb800 100644 (file)
--- a/gcc/config/s390/subst.md
+++ b/gcc/config/s390/subst.md
@@ -120,3 +120,28 @@
    (clobber (match_scratch:DSI 0 "=d,d"))])
 
 (define_subst_attr "cconly" "cconly_subst" "" "_cconly")
+
+
+;; setmem substitution patterns
+
+; Add an AND operation on the padding byte operand.  Only the lowest 8
+; bit are used and the rest is ignored.
+(define_subst "setmem_and_subst"
+  [(clobber (match_operand:TDI                  0 "register_operand" ""))
+   (set (mem:BLK (subreg:DSI (match_operand:TDI 1 "register_operand" "") 0))
+        (unspec:BLK [(match_operand:DSI         2 "shift_count_or_setmem_operand" "")
+                    (match_operand:DSI         3 "register_operand" "")]
+                    UNSPEC_REPLICATE_BYTE))
+   (use (match_operand:TDI                      4 "register_operand" ""))
+   (clobber (reg:CC CC_REGNUM))]
+""
+  [(clobber (match_dup 0))
+   (set (mem:BLK (subreg:DSI (match_dup 1) 0))
+       (unspec:BLK [(and:DSI (match_dup 2)
+                             (match_operand:DSI 5 "const_int_8bitset_operand" "jm8"))
+                    (match_dup 3)]
+                   UNSPEC_REPLICATE_BYTE))
+   (use (match_dup 4))
+   (clobber (reg:CC CC_REGNUM))])
+
+(define_subst_attr "setmem_and"      "setmem_and_subst" "" "_and")