if (RA.isvec) while (!(ps & 1<<i)) i++;
if (RAupdate.isvec) while (!(ps & 1<<u)) u++;
if (RT.isvec) while (!(pd & 1<<j)) j++;
- if svctx.ldstmode == bitreversed: # for FFT/DCT
- # FFT/DCT bitreversed mode
+ if svctx.ldstmode == shifted: # for FFT/DCT
+ # FFT/DCT shifted mode
if (RA.isvec)
srcbase = ireg[RA+i]
else
srcbase = ireg[RA]
- offs = (bitrev(i, VL) * immed) << RC
+ offs = (i * immed) << RC
elif svctx.ldstmode == elementstride:
# element stride mode
srcbase = ireg[RA]