sim: mn10300: fix SMP compile
authorMike Frysinger <vapier@gentoo.org>
Sun, 25 Dec 2022 05:28:55 +0000 (00:28 -0500)
committerMike Frysinger <vapier@gentoo.org>
Sun, 25 Dec 2022 07:09:18 +0000 (02:09 -0500)
The igen tool sets up the SD define for code fragments to use, but
mn10300 was expecting "sd".  Change all the igen related code to use
SD so it actually compiles.

sim/mn10300/am33.igen
sim/mn10300/mn10300-sim.h
sim/mn10300/mn10300.igen

index 964f07521a8c64c40245a7b99cfcdfa12938a802..da8f88fa599f58173b78c20be92a589fdf2276bd 100644 (file)
       usp += 4;
     }
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x1)
   PC = cia;
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x4)
index f6e4d854a144a5450a9b4eeb373cd61ccba1e5b0..3eadc0fe178064282d79442c77b11ec7a66aee1f 100644 (file)
@@ -182,10 +182,10 @@ dw2u64 (dword data)
 /* Bring data in from the cold */
 
 #define IMEM8(EA) \
-(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA)))
+(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA)))
 
 #define IMEM8_IMMED(EA, N) \
-(sim_core_read_aligned_1(STATE_CPU(sd, 0), EA, exec_map, (EA) + (N)))
+(sim_core_read_aligned_1(STATE_CPU (SD, 0), EA, exec_map, (EA) + (N)))
 
 /* Function declarations.  */
 
index 6330d6f0090a873c14c33de502e3df75d4caed07..42c0ead205d2eb1e0eafb8735628cd0d5f52bbae 100644 (file)
       sp += 4;
     }
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x1)
   PC = cia;
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x4)
 
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x4)
 
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
       if (mask & 0x4)
   offset = -4;
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {
 
   offset = -4;
   mask = REGS;
 
-  if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33
-      || STATE_ARCHITECTURE (sd)->mach == bfd_mach_am33_2
+  if (STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33
+      || STATE_ARCHITECTURE (SD)->mach == bfd_mach_am33_2
       )
     {