Merge pull request #988 from YosysHQ/clifford/fix987

Add approximate support for SV "var" keyword

diff --cc frontends/verilog/verilog_lexer.l
index e9763266390b70a62a2e3f691b2a6f74a137417e,59ef3e36ef7d2ddce28174ff8991cd45385ba2fc..08e556e8e03ad62b696d25f5497629420b9cfe2e
--- 1/frontends/verilog/verilog_lexer.l
--- 2/frontends/verilog/verilog_lexer.l
+++ b/frontends/verilog/verilog_lexer.l
@@@ -206,8 -206,8 +206,9 @@@ YOSYS_NAMESPACE_EN
  "const"      { if (formal_mode) return TOK_CONST; SV_KEYWORD(TOK_CONST); }
  "checker"    { if (formal_mode) return TOK_CHECKER; SV_KEYWORD(TOK_CHECKER); }
  "endchecker" { if (formal_mode) return TOK_ENDCHECKER; SV_KEYWORD(TOK_ENDCHECKER); }
 +"final"      { SV_KEYWORD(TOK_FINAL); }
  "logic"      { SV_KEYWORD(TOK_LOGIC); }
+ "var"        { SV_KEYWORD(TOK_VAR); }
  "bit"        { SV_KEYWORD(TOK_REG); }
  
  "eventually"   { if (formal_mode) return TOK_EVENTUALLY; SV_KEYWORD(TOK_EVENTUALLY); }

diff --cc frontends/verilog/verilog_parser.y
Simple merge