(no commit message)

diff --git a/openpower/sv/rfc/ls002/discussion.mdwn b/openpower/sv/rfc/ls002/discussion.mdwn
index 247fdf7f4275c95c538a5353d237c7a2f98ddc4c..28e512ff294323a6f0bc2a1aa1b49895a3092d09 100644 (file)
--- a/openpower/sv/rfc/ls002/discussion.mdwn
+++ b/openpower/sv/rfc/ls002/discussion.mdwn
@@ -40,7 +40,8 @@ be a different matter.
    architecture spec.  In particular, the architecture spec tends to use
    "Move" for instructions that transfer data between registers.  Here are
    two approaches.
-
+**
+```
    a. Model the instructions on li (Load Immediate), an extended mnemonic for
       addi.
         fmvis --> Floating Load Immediate Single (flis)
@@ -58,7 +59,7 @@ be a different matter.
 
    I prefer (a), because I think it's confusing to treat these instructions,
    which don't access storage, like instructions that do access storage.
-**
+```
 
 the fact that they bypass D-Cache and correspondingly raise no flags or
 exceptions is the connection to `ld`.  despite that i like (a) as well