freedreno/ir3: move ubo_state into const_state
authorRob Clark <robdclark@chromium.org>
Sun, 14 Jun 2020 19:44:17 +0000 (12:44 -0700)
committerMarge Bot <eric+marge@anholt.net>
Fri, 19 Jun 2020 13:16:57 +0000 (13:16 +0000)
As with const_state, this will also need to move into the variant.  To
simplify that, just move it into the const_state itself, since after all
it is related.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5508>

src/freedreno/ir3/ir3_compiler_nir.c
src/freedreno/ir3/ir3_nir.c
src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
src/freedreno/ir3/ir3_shader.h
src/freedreno/vulkan/tu_cmd_buffer.c
src/freedreno/vulkan/tu_pipeline.c
src/freedreno/vulkan/tu_private.h
src/gallium/drivers/freedreno/a6xx/fd6_const.c
src/gallium/drivers/freedreno/ir3/ir3_const.h

index 88de1122ef81c472db55d489b0364fd9b8d94db6..bb45ba2c049e3b0b9b16f76746a40c97ac57fff3 100644 (file)
@@ -1461,7 +1461,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
                         * addr reg value can be:
                         */
                        ctx->so->constlen = MAX2(ctx->so->constlen,
-                                       ctx->so->shader->ubo_state.size / 16);
+                                       const_state->ubo_state.size / 16);
                }
                break;
 
index 364ebf3057a12308b35d69e301faf474893d0333..e1c163ddc5cb1d9fbca574249c9779fdcdc81886 100644 (file)
@@ -479,8 +479,8 @@ ir3_setup_const_state(struct ir3_shader *shader, nir_shader *nir,
        /* num_driver_params is scalar, align to vec4: */
        const_state->num_driver_params = align(const_state->num_driver_params, 4);
 
-       debug_assert((shader->ubo_state.size % 16) == 0);
-       unsigned constoff = shader->ubo_state.size / 16;
+       debug_assert((const_state->ubo_state.size % 16) == 0);
+       unsigned constoff = const_state->ubo_state.size / 16;
        unsigned ptrsz = ir3_pointer_size(compiler);
 
        if (const_state->num_ubos > 0) {
index 449d908a290d2d9548c8916d30093c8af57283c6..26f9aadaa5b411275245ab63ce9d430bf0776df4 100644 (file)
@@ -304,7 +304,7 @@ instr_is_load_ubo(nir_instr *instr)
 bool
 ir3_nir_analyze_ubo_ranges(nir_shader *nir, struct ir3_shader *shader)
 {
-       struct ir3_ubo_analysis_state *state = &shader->ubo_state;
+       struct ir3_ubo_analysis_state *state = &shader->const_state.ubo_state;
 
        memset(state, 0, sizeof(*state));
        for (int i = 0; i < IR3_MAX_UBO_PUSH_RANGES; i++) {
index f646f33469067ca5a6a23fc6f3db25ebfbba8858..a89abfe9e166d1ec268c651d38a5f15e6e019687 100644 (file)
@@ -73,6 +73,22 @@ enum ir3_driver_param {
 #define IR3_MAX_UBO_PUSH_RANGES  32
 
 
+struct ir3_ubo_range {
+       uint32_t offset; /* start offset to push in the const register file */
+       uint32_t block; /* Which constant block */
+       uint32_t start, end; /* range of block that's actually used */
+       uint16_t bindless_base; /* For bindless, which base register is used */
+       bool bindless;
+};
+
+struct ir3_ubo_analysis_state {
+       struct ir3_ubo_range range[IR3_MAX_UBO_PUSH_RANGES];
+       uint32_t num_enabled;
+       uint32_t size;
+       uint32_t lower_count;
+       uint32_t cmdstream_size; /* for per-gen backend to stash required cmdstream size */
+};
+
 /**
  * Describes the layout of shader consts.  This includes:
  *   + User consts + driver lowered UBO ranges
@@ -157,6 +173,9 @@ struct ir3_const_state {
        struct {
                uint32_t val[4];
        } *immediates;
+
+       /* State of ubo access lowered to push consts: */
+       struct ir3_ubo_analysis_state ubo_state;
 };
 
 /**
@@ -588,22 +607,6 @@ ir3_shader_stage(struct ir3_shader_variant *v)
        }
 }
 
-struct ir3_ubo_range {
-       uint32_t offset; /* start offset to push in the const register file */
-       uint32_t block; /* Which constant block */
-       uint32_t start, end; /* range of block that's actually used */
-       uint16_t bindless_base; /* For bindless, which base register is used */
-       bool bindless;
-};
-
-struct ir3_ubo_analysis_state {
-       struct ir3_ubo_range range[IR3_MAX_UBO_PUSH_RANGES];
-       uint32_t num_enabled;
-       uint32_t size;
-       uint32_t lower_count;
-       uint32_t cmdstream_size; /* for per-gen backend to stash required cmdstream size */
-};
-
 
 struct ir3_shader {
        gl_shader_stage type;
@@ -619,8 +622,6 @@ struct ir3_shader {
 
        struct ir3_compiler *compiler;
 
-       struct ir3_ubo_analysis_state ubo_state;
-
        /* Number of UBOs loaded by LDC, as opposed to LDG through pointers in
         * ubo_state.
         */
index 9a83632a1965954bd35d66533d991df9b93bfb25..6b196e70868302b032b65324e9c5c59c7aab7363 100644 (file)
@@ -2912,7 +2912,7 @@ tu6_emit_user_consts(struct tu_cs *cs, const struct tu_pipeline *pipeline,
 {
    const struct tu_program_descriptor_linkage *link =
       &pipeline->program.link[type];
-   const struct ir3_ubo_analysis_state *state = &link->ubo_state;
+   const struct ir3_ubo_analysis_state *state = &link->const_state.ubo_state;
 
    if (link->push_consts.count > 0) {
       unsigned num_units = link->push_consts.count;
index 1bd40f0ccc9d9fe180e52ef52ba203059b9ba91b..9c7cc4e08afff971c0affb2ca545fe6a91c00ecc 100644 (file)
@@ -1807,7 +1807,6 @@ tu_pipeline_set_linkage(struct tu_program_descriptor_linkage *link,
                         struct tu_shader *shader,
                         struct ir3_shader_variant *v)
 {
-   link->ubo_state = v->shader->ubo_state;
    link->const_state = *ir3_const_state(v);
    link->constlen = v->constlen;
    link->push_consts = shader->push_consts;
index 4fd2120c3663b3ac1e390ec71f63f87423696dcb..39f303ee7d7c596787bcc169316a161e9e094a9a 100644 (file)
@@ -1045,7 +1045,6 @@ tu_shader_destroy(struct tu_device *dev,
 
 struct tu_program_descriptor_linkage
 {
-   struct ir3_ubo_analysis_state ubo_state;
    struct ir3_const_state const_state;
 
    uint32_t constlen;
index ad67378a27ca4d39dcf349cba8159f8c0610a5bc..5b591441839291537a7ed507ac14fbc48be31749 100644 (file)
@@ -280,7 +280,7 @@ fd6_emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
 static unsigned
 user_consts_cmdstream_size(struct ir3_shader_variant *v)
 {
-       struct ir3_ubo_analysis_state *ubo_state = &v->shader->ubo_state;
+       struct ir3_ubo_analysis_state *ubo_state = &ir3_const_state(v)->ubo_state;
 
        if (unlikely(!ubo_state->cmdstream_size)) {
                unsigned packets, size;
index 92923d28863cf347eabf418acb0db0b3095e32a2..2b92ac920b77bbd175213524396df9913b780bb5 100644 (file)
@@ -93,8 +93,8 @@ static inline void
 ir3_emit_user_consts(struct fd_screen *screen, const struct ir3_shader_variant *v,
                struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
 {
-       struct ir3_ubo_analysis_state *state;
-       state = &v->shader->ubo_state;
+       const struct ir3_const_state *const_state = ir3_const_state(v);
+       const struct ir3_ubo_analysis_state *state = &const_state->ubo_state;
 
        for (unsigned i = 0; i < state->num_enabled; i++) {
                assert(!state->range[i].bindless);