} __attribute__((packed));
struct bifrost_tiler_meta {
- u64 zero0;
+ u32 tiler_heap_next_start; /* To be written by the GPU */
+ u32 used_hierarchy_mask; /* To be written by the GPU */
u16 hierarchy_mask; /* Five values observed: 0xa, 0x14, 0x28, 0x50, 0xa0 */
u16 flags;
u16 width;
u16 height;
- u64 zero1;
+ u64 zero0;
mali_ptr tiler_heap_meta;
/* TODO what is this used for? */
u64 zeros[20];
pandecode_log("struct bifrost_tiler_meta tiler_meta_%"PRIx64"_%d = {\n", gpu_va, job_no);
pandecode_indent++;
- if (t->zero0 || t->zero1) {
- pandecode_msg("XXX: tiler meta zero tripped\n");
- pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
- pandecode_prop("zero1 = 0x%" PRIx64, t->zero1);
- }
+ pandecode_prop("tiler_heap_next_start = 0x%" PRIx32, t->tiler_heap_next_start);
+ pandecode_prop("used_hierarchy_mask = 0x%" PRIx32, t->used_hierarchy_mask);
if (t->hierarchy_mask != 0xa &&
t->hierarchy_mask != 0x14 &&
pandecode_prop("width = MALI_POSITIVE(%d)", t->width + 1);
pandecode_prop("height = MALI_POSITIVE(%d)", t->height + 1);
+ if (t->zero0) {
+ pandecode_msg("XXX: tiler meta zero tripped\n");
+ pandecode_prop("zero0 = 0x%" PRIx64, t->zero0);
+ }
+
for (int i = 0; i < 12; i++) {
if (t->zeros[i] != 0) {
pandecode_msg("XXX: tiler heap zero %d tripped, value %" PRIx64 "\n",