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xaiger: do not promote output wires
author
Eddie Hung
<eddie@fpgeh.com>
Wed, 27 Nov 2019 03:03:02 +0000
(19:03 -0800)
committer
Eddie Hung
<eddie@fpgeh.com>
Wed, 27 Nov 2019 05:55:37 +0000
(21:55 -0800)
backends/aiger/xaiger.cc
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diff --git
a/backends/aiger/xaiger.cc
b/backends/aiger/xaiger.cc
index 46890b0712359ba9880baaa9e86fcb15283fedfe..85136118a9ab5c79f4f6bddc1884ecc553217afc 100644
(file)
--- a/
backends/aiger/xaiger.cc
+++ b/
backends/aiger/xaiger.cc
@@
-153,11
+153,6
@@
struct XAigerWriter
if (wire->port_input)
sigmap.add(wire);
- // promote output wires
- for (auto wire : module->wires())
- if (wire->port_output)
- sigmap.add(wire);
-
for (auto wire : module->wires())
{
bool keep = wire->attributes.count("\\keep");