intel/fs: Fix fs_builder::sample_mask_reg() for 32-wide FS dispatch.
authorFrancisco Jerez <currojerez@riseup.net>
Mon, 9 Jan 2017 22:14:02 +0000 (14:14 -0800)
committerJason Ekstrand <jason.ekstrand@intel.com>
Thu, 28 Jun 2018 20:19:38 +0000 (13:19 -0700)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
src/intel/compiler/brw_fs_builder.h

index 4203c8c27c3d34121d931aa418ac1ed53179f621..7bee2aa0b9b4d860244b61e371813fafc132427c 100644 (file)
@@ -235,14 +235,14 @@ namespace brw {
       src_reg
       sample_mask_reg() const
       {
-         assert(shader->stage != MESA_SHADER_FRAGMENT ||
-                group() + dispatch_width() <= 16);
          if (shader->stage != MESA_SHADER_FRAGMENT) {
             return brw_imm_d(0xffffffff);
          } else if (brw_wm_prog_data(shader->stage_prog_data)->uses_kill) {
             return brw_flag_reg(0, 1);
          } else {
-            return retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UD);
+            assert(shader->devinfo->gen >= 6 && dispatch_width() <= 16);
+            return retype(brw_vec1_grf((_group >= 16 ? 2 : 1), 7),
+                          BRW_REGISTER_TYPE_UD);
          }
       }