re PR target/14702 (wrong definitions of instructions mmx_pshufw, sse2_pshufd, sse2_p...

        PR target/14702
        * config/i386/i386.md: fix source operand constraints in
        mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw

From-SVN: r80330

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0d3b02b64fa6349d91a51e4921b94f434b032597..5f47077d39533351e7856fcfa4bcb146baabf8b6 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-04-01  Serge Belyshev  <1319@bot.ru>
+
+        PR target/14702
+        * config/i386/i386.md: fix source operand constraints in
+        mmx_pshufw, sse2_pshufd, sse2_pshuflw, sse2_pshufhw
+
 2004-04-01  Waldek Hebisch  <hebisch@math.uni.wroc.pl>
 
        * fold-const.c (folda): Preserve types of comparisons.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 4906d35b7d0216b6467c3b9e5d1a87003f21f7c1..47482a97a63239d3f0bc685a5cd5d71a5675393d 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -20624,7 +20624,7 @@
 
 (define_insn "mmx_pshufw"
   [(set (match_operand:V4HI 0 "register_operand" "=y")
-        (unspec:V4HI [(match_operand:V4HI 1 "register_operand" "0")
+        (unspec:V4HI [(match_operand:V4HI 1 "nonimmediate_operand" "ym")
                      (match_operand:SI 2 "immediate_operand" "i")]
                     UNSPEC_SHUFFLE))]
   "TARGET_SSE || TARGET_3DNOW_A"
@@ -22321,7 +22321,7 @@
 
 (define_insn "sse2_pshufd"
   [(set (match_operand:V4SI 0 "register_operand" "=x")
-        (unspec:V4SI [(match_operand:V4SI 1 "register_operand" "0")
+        (unspec:V4SI [(match_operand:V4SI 1 "nonimmediate_operand" "xm")
                      (match_operand:SI 2 "immediate_operand" "i")]
                     UNSPEC_SHUFFLE))]
   "TARGET_SSE2"
@@ -22331,7 +22331,7 @@
 
 (define_insn "sse2_pshuflw"
   [(set (match_operand:V8HI 0 "register_operand" "=x")
-        (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0")
+        (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm")
                      (match_operand:SI 2 "immediate_operand" "i")]
                     UNSPEC_PSHUFLW))]
   "TARGET_SSE2"
@@ -22341,7 +22341,7 @@
 
 (define_insn "sse2_pshufhw"
   [(set (match_operand:V8HI 0 "register_operand" "=x")
-        (unspec:V8HI [(match_operand:V8HI 1 "register_operand" "0")
+        (unspec:V8HI [(match_operand:V8HI 1 "nonimmediate_operand" "xm")
                      (match_operand:SI 2 "immediate_operand" "i")]
                     UNSPEC_PSHUFHW))]
   "TARGET_SSE2"