+2003-02-11 Kazu Hirata <kazu@cs.umass.edu>
+
+ * config/h8300/h8300-protos.h: Add a prototype for
+ gtuleu_operator.
+ * config/h8300/h8300.c (gtuleu_operator): New.
+ * config/h8300/h8300.h (PREDICATE_CODES): Add gtuleu_operator.
+ * config/h8300/h8300.md (a peephole2): New.
+
Tue Feb 11 13:32:12 CET 2003 Jan Hubicka <jh@suse.cz>
* sched-ebb.c (schedule_ebbs): Do not verify_flow_info.
extern int bit_operator PARAMS ((rtx, enum machine_mode));
extern int nshift_operator PARAMS ((rtx, enum machine_mode));
extern int eqne_operator PARAMS ((rtx, enum machine_mode));
+extern int gtuleu_operator PARAMS ((rtx, enum machine_mode));
extern int h8300_eightbit_constant_address_p PARAMS ((rtx));
extern int h8300_tiny_constant_address_p PARAMS ((rtx));
return (code == EQ || code == NE);
}
+/* Return nonzero if X is either GTU or LEU. */
+
+int
+gtuleu_operator (x, mode)
+ rtx x;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+ enum rtx_code code = GET_CODE (x);
+
+ return (code == GTU || code == LEU);
+}
+
/* Recognize valid operators for bit instructions. */
int
{"incdec_operand", {CONST_INT}}, \
{"bit_operator", {XOR, AND, IOR}}, \
{"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \
- {"eqne_operator", {EQ, NE}},
+ {"eqne_operator", {EQ, NE}}, \
+ {"gtuleu_operator", {GTU, LEU}},
#endif /* ! GCC_H8300_H */
"operands[1] = GEN_INT (- INTVAL (operands[1]));
split_adds_subs (SImode, operands, 1);")
+;; Transform A <= 1 to (A & 0xfffffffe) == 0.
+
+(define_peephole2
+ [(set (cc0)
+ (compare:SI (match_operand:SI 0 "register_operand" "")
+ (match_operand:SI 1 "const_int_operand" "")))
+ (set (pc)
+ (if_then_else (match_operator 2 "gtuleu_operator"
+ [(cc0) (const_int 0)])
+ (label_ref (match_operand 3 "" ""))
+ (pc)))]
+ "(TARGET_H8300H || TARGET_H8300S)
+ && find_regno_note (insn, REG_DEAD, REGNO (operands[0]))
+ && (INTVAL (operands[1]) == 1
+ || INTVAL (operands[1]) == 3
+ || INTVAL (operands[1]) == 7
+ || INTVAL (operands[1]) == 15
+ || INTVAL (operands[1]) == 31
+ || INTVAL (operands[1]) == 64
+ || INTVAL (operands[1]) == 127
+ || INTVAL (operands[1]) == 65535)"
+ [(set (match_dup 0)
+ (and:SI (match_dup 0)
+ (match_dup 5)))
+ (set (cc0)
+ (match_dup 0))
+ (set (pc)
+ (if_then_else (match_dup 4)
+ (label_ref (match_dup 3))
+ (pc)))]
+ "operands[4] = ((GET_CODE (operands[2]) == GTU) ?
+ gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) :
+ gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
+ operands[5] = GEN_INT (~INTVAL (operands[1]));")
+
;; Narrow the mode of testing if possible.
(define_peephole2