h8300-protos.h: Add a prototype for gtuleu_operator.

	* config/h8300/h8300-protos.h: Add a prototype for
	gtuleu_operator.
	* config/h8300/h8300.c (gtuleu_operator): New.
	* config/h8300/h8300.h (PREDICATE_CODES): Add gtuleu_operator.
	* config/h8300/h8300.md (a peephole2): New.

From-SVN: r62696

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 809ee40ca0705b3866ff59f6b5dce8143fb84772..99e2b90ca5544f076ef749385c7c086349ff41d1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2003-02-11  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/h8300/h8300-protos.h: Add a prototype for
+       gtuleu_operator.
+       * config/h8300/h8300.c (gtuleu_operator): New.
+       * config/h8300/h8300.h (PREDICATE_CODES): Add gtuleu_operator.
+       * config/h8300/h8300.md (a peephole2): New.
+
 Tue Feb 11 13:32:12 CET 2003  Jan Hubicka  <jh@suse.cz>
 
        * sched-ebb.c (schedule_ebbs): Do not verify_flow_info.

diff --git a/gcc/config/h8300/h8300-protos.h b/gcc/config/h8300/h8300-protos.h
index db91143966d46e7e43af837b46ed1daa96341359..b65f3f4ab8b7dc420c78f1dc7ba84d7a49e93bf6 100644 (file)
--- a/gcc/config/h8300/h8300-protos.h
+++ b/gcc/config/h8300/h8300-protos.h
@@ -70,6 +70,7 @@ extern int incdec_operand PARAMS ((rtx, enum machine_mode));
 extern int bit_operator PARAMS ((rtx, enum machine_mode));
 extern int nshift_operator PARAMS ((rtx, enum machine_mode));
 extern int eqne_operator PARAMS ((rtx, enum machine_mode));
+extern int gtuleu_operator PARAMS ((rtx, enum machine_mode));
 
 extern int h8300_eightbit_constant_address_p PARAMS ((rtx));
 extern int h8300_tiny_constant_address_p PARAMS ((rtx));

diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index 3a2f12e2a39fc2e90a231f8d9a8695dacc656a6a..ed5b3a081486f88e93a0f128f6391c223f556673 100644 (file)
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -1925,6 +1925,18 @@ eqne_operator (x, mode)
   return (code == EQ || code == NE);
 }
 
+/* Return nonzero if X is either GTU or LEU.  */
+
+int
+gtuleu_operator (x, mode)
+     rtx x;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+  enum rtx_code code = GET_CODE (x);
+
+  return (code == GTU || code == LEU);
+}
+
 /* Recognize valid operators for bit instructions.  */
 
 int

diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 346537187c4d333b2aab24df019d636642889ec0..333101059a7986c1d0e264ff0584cbf47d732e75 100644 (file)
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -1293,6 +1293,7 @@ struct cum_arg
   {"incdec_operand", {CONST_INT}},                                     \
   {"bit_operator", {XOR, AND, IOR}},                                   \
   {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}},                   \
-  {"eqne_operator", {EQ, NE}},
+  {"eqne_operator", {EQ, NE}},                                         \
+  {"gtuleu_operator", {GTU, LEU}},
 
 #endif /* ! GCC_H8300_H */

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 69e2f720c3a90411995cec47c4ba006d8b7cd7f1..a95957eb17f6483e059509166ee4014219f01f72 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -3480,6 +3480,41 @@
   "operands[1] = GEN_INT (- INTVAL (operands[1]));
    split_adds_subs (SImode, operands, 1);")
 
+;; Transform A <= 1 to (A & 0xfffffffe) == 0.
+
+(define_peephole2
+  [(set (cc0)
+       (compare:SI (match_operand:SI 0 "register_operand" "")
+                   (match_operand:SI 1 "const_int_operand" "")))
+   (set (pc)
+       (if_then_else (match_operator 2 "gtuleu_operator"
+                       [(cc0) (const_int 0)])
+                     (label_ref (match_operand 3 "" ""))
+                     (pc)))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && find_regno_note (insn, REG_DEAD, REGNO (operands[0]))
+   && (INTVAL (operands[1]) == 1
+       || INTVAL (operands[1]) == 3
+       || INTVAL (operands[1]) == 7
+       || INTVAL (operands[1]) == 15
+       || INTVAL (operands[1]) == 31
+       || INTVAL (operands[1]) == 64
+       || INTVAL (operands[1]) == 127
+       || INTVAL (operands[1]) == 65535)"
+  [(set (match_dup 0)
+       (and:SI (match_dup 0)
+               (match_dup 5)))
+   (set (cc0)
+       (match_dup 0))
+   (set (pc)
+       (if_then_else (match_dup 4)
+                     (label_ref (match_dup 3))
+                     (pc)))]
+  "operands[4] = ((GET_CODE (operands[2]) == GTU) ?
+                 gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx) :
+                 gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx));
+   operands[5] = GEN_INT (~INTVAL (operands[1]));")
+
 ;; Narrow the mode of testing if possible.
 
 (define_peephole2