Fix the V850 assembler's generation of relocations for the st.b instruction.

	PR 28292
gas	* config/tc-v850.c (handle_lo16): Also accept
	BFD_RELOC_V850_LO16_SPLIT_OFFSET.
	* testsuite/gas/v850/split-lo16.s: Add extra line.
	* testsuite/gas/v850/split-lo16.d: Update expected disassembly.

opcodes	* v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place
	of BFD_RELOC_16.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a5d5fbc64d89b8c46d8bb4c6d0ea221dd74393cb..0eb90ac4aa480980f5460aa0431d71713a26148e 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,11 @@
+2021-09-02  Nick Clifton  <nickc@redhat.com>
+
+       PR 28292
+       * config/tc-v850.c (handle_lo16): Also accept
+       BFD_RELOC_V850_LO16_SPLIT_OFFSET.
+       * testsuite/gas/v850/split-lo16.s: Add extra line.
+       * testsuite/gas/v850/split-lo16.d: Update expected disassembly.
+
 2021-08-11  Darius Galis  <darius.galis@cyberthorstudios.com>
 
        * config/rx-parse.y (DECNT): Fixed typo.

diff --git a/gas/config/tc-v850.c b/gas/config/tc-v850.c
index 81449d05741bdf506010eb91497863c727f1ccca..915881bd22ea25bc4b2b88581d163c15888d73f0 100644 (file)
--- a/gas/config/tc-v850.c
+++ b/gas/config/tc-v850.c
@@ -1713,7 +1713,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
       /* Now create the conditional branch + fixup to the final target.  */
       /* 0x000107ea = bne LBL(disp17).  */
       md_number_to_chars ((char *) buffer + 2, 0x000107ea, 4);
-      fix_new (fragP, fragP->fr_fix+2, 4, fragP->fr_symbol,
+      fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
               fragP->fr_offset, 1,
               BFD_RELOC_V850_17_PCREL);
       fragP->fr_fix += 6;
@@ -2020,22 +2020,19 @@ handle_lo16 (const struct v850_operand *operand, const char **errmsg)
 {
   if (operand == NULL)
     return BFD_RELOC_LO16;
-
-  if (operand->default_reloc == BFD_RELOC_LO16)
-    return BFD_RELOC_LO16;
-
-  if (operand->default_reloc == BFD_RELOC_V850_16_SPLIT_OFFSET)
-    return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
-
-  if (operand->default_reloc == BFD_RELOC_V850_16_S1)
-    return BFD_RELOC_V850_LO16_S1;
-
-  if (operand->default_reloc == BFD_RELOC_16)
-    return BFD_RELOC_LO16;
-
-  *errmsg = _("lo() relocation used on an instruction which does "
-             "not support it");
-  return BFD_RELOC_64;  /* Used to indicate an error condition.  */
+  
+  switch (operand->default_reloc)
+    {
+    case BFD_RELOC_LO16: return BFD_RELOC_LO16;
+    case BFD_RELOC_V850_LO16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
+    case BFD_RELOC_V850_16_SPLIT_OFFSET: return BFD_RELOC_V850_LO16_SPLIT_OFFSET;
+    case BFD_RELOC_V850_16_S1: return BFD_RELOC_V850_LO16_S1;
+    case BFD_RELOC_16: return BFD_RELOC_LO16;
+    default:
+      *errmsg = _("lo() relocation used on an instruction which does "
+                 "not support it");
+      return BFD_RELOC_64;  /* Used to indicate an error condition.  */
+    }
 }
 
 static bfd_reloc_code_real_type
@@ -2157,15 +2154,15 @@ v850_reloc_prefix (const struct v850_operand *operand, const char **errmsg)
       return reloc;                                                    \
     }
 
-  CHECK_ ("hi0",    handle_hi016(operand, errmsg)  );
-  CHECK_ ("hi",            handle_hi16(operand, errmsg)   );
-  CHECK_ ("lo",            handle_lo16 (operand, errmsg)  );
+  CHECK_ ("hi0",    handle_hi016 (operand, errmsg));
+  CHECK_ ("hi",            handle_hi16 (operand, errmsg));
+  CHECK_ ("lo",            handle_lo16 (operand, errmsg));
   CHECK_ ("sdaoff", handle_sdaoff (operand, errmsg));
   CHECK_ ("zdaoff", handle_zdaoff (operand, errmsg));
   CHECK_ ("tdaoff", handle_tdaoff (operand, errmsg));
   CHECK_ ("hilo",   BFD_RELOC_32);
   CHECK_ ("lo23",   BFD_RELOC_V850_23);
-  CHECK_ ("ctoff",  handle_ctoff (operand, errmsg) );
+  CHECK_ ("ctoff",  handle_ctoff (operand, errmsg));
 
   /* Restore skipped parenthesis.  */
   if (paren_skipped)

diff --git a/gas/testsuite/gas/v850/split-lo16.d b/gas/testsuite/gas/v850/split-lo16.d
index 9580c80e55aaccbb0fbf7b5b4e7a6881e1a6d0d0..0108208bf7c84a97616c2bfb498978be55288d49 100644 (file)
--- a/gas/testsuite/gas/v850/split-lo16.d
+++ b/gas/testsuite/gas/v850/split-lo16.d
@@ -8,11 +8,13 @@
    4:  01 16 00 00     addi    0, r1, r2
                        6: R_V8.*       foo
    8:  01 17 00 00     ld\.b   0\[r1\], r2
-                       a: R_V8.*       foo
+                       8: R_V8.*       foo
    c:  81 17 01 00     ld\.bu  0\[r1\], r2
                        c: R_V8.*       foo
   10:  a1 17 45 23     ld\.bu  9029\[r1\], r2
   14:  81 17 57 34     ld\.bu  13398\[r1\], r2
   18:  20 57 01 00     ld.w    0\[r0\], r10
   1c:  20 57 79 56     ld.w    22136\[r0\], r10
+  20:  40 57 00 00     st.b    r10, 0\[r0\]
+                       20: R_V8.*      VSWC
 #pass

diff --git a/gas/testsuite/gas/v850/split-lo16.s b/gas/testsuite/gas/v850/split-lo16.s
index bb6fb666c07d68d7bd6c2d8aeabbc0aa1431569a..7ca9cb3754af516fe172cad426de00d4ea26c9c2 100644 (file)
--- a/gas/testsuite/gas/v850/split-lo16.s
+++ b/gas/testsuite/gas/v850/split-lo16.s
@@ -6,5 +6,8 @@
        ld.bu   lo(0x12345),r1,r2
        ld.bu   lo(0x123456),r1,r2
 
-       ld.w lo(0)[r0], r10
-       ld.w lo(0x12345678)[r0], r10
+       ld.w    lo(0)[r0], r10
+       ld.w    lo(0x12345678)[r0], r10
+
+       # This is from PR 28292
+       st.b    r10, VSWC[r0]

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d0bfa80769138639cdf2ee253fd29f7e36755bf5..ca3206dda6d5cb7212ee8a29c1739a430f3fcb4d 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2021-09-02  Nick Clifton  <nickc@redhat.com>
+
+       PR 28292
+       * v850-opc.c (D16): Use BFD_RELOC_V850_LO16_SPLIT_OFFSET in place
+       of BFD_RELOC_16.
+
 2021-08-17  Shahab Vahedi <shahab@synopsys.com>
 
        * arc-regs.h (DEF): Fix the register numbers.

diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 24720b363c3f82e0c2994eaac945669a2eff3c26..852fe61100887c79c89901cf8ee349c28050cb35 100644 (file)
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -1190,7 +1190,7 @@ const struct v850_operand v850_operands[] =
 
 /* The disp16 field in a format 8 insn.  */
 #define D16    (I16U + 1)
-  { 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_16 },
+  { 16, 16, NULL, NULL, V850_OPERAND_SIGNED | V850_OPERAND_DISP, BFD_RELOC_V850_LO16_SPLIT_OFFSET },
 
 /* The disp16 field in an format 7 unsigned byte load insn.  */
 #define D16_16 (D16 + 1)