re PR tree-optimization/81571 (ICE at -O3 in both 32-bit and 64-bit modes (internal...
authorRichard Biener <rguenther@suse.de>
Thu, 27 Jul 2017 13:44:51 +0000 (13:44 +0000)
committerRichard Biener <rguenth@gcc.gnu.org>
Thu, 27 Jul 2017 13:44:51 +0000 (13:44 +0000)
2017-07-27  Richard Biener  <rguenther@suse.de>

PR tree-optimization/81571
* tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
PHIs.

* gcc.dg/torture/pr81571.c: New testcase.

From-SVN: r250626

gcc/ChangeLog
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/torture/pr81571.c [new file with mode: 0644]
gcc/tree-vect-slp.c

index 3beab6c5251c8c66cb76d9aecbc7fc4bcce8e7fb..3ae2f46c8f2b2cf88ea5b8411d4cf9bed4b824a7 100644 (file)
@@ -1,3 +1,9 @@
+2017-07-27  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/81571
+       * tree-vect-slp.c (vect_build_slp_tree): Properly verify reduction
+       PHIs.
+
 2017-07-27  Eric Botcazou  <ebotcazou@adacore.com>
 
        * config/sparc/sparc.c (sparc_option_override): Set MASK_FSMULD flag
index 292fa5b7885a677021cd544c4020804310e8f669..e12654400b92c477b7705b2f4f4fb4aa3fcd440a 100644 (file)
@@ -1,3 +1,8 @@
+2017-07-27  Richard Biener  <rguenther@suse.de>
+
+       PR tree-optimization/81571
+       * gcc.dg/torture/pr81571.c: New testcase.
+
 2017-07-27  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/81502
diff --git a/gcc/testsuite/gcc.dg/torture/pr81571.c b/gcc/testsuite/gcc.dg/torture/pr81571.c
new file mode 100644 (file)
index 0000000..74bceb7
--- /dev/null
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+
+int a, b, c, d;
+short fn1(int p1, int p2) { return p1; }
+
+int fn2(int p1) {}
+
+int main()
+{
+  for (; c; c++)
+    a |= fn1(1, a) | fn2(b |= d);
+  return 0;
+}
index 7cfeeb989786385174d0e5c2a9908508b0438196..15d589d345257c56cc31fa7392558d12222cc543 100644 (file)
@@ -947,11 +947,27 @@ vect_build_slp_tree (vec_info *vinfo,
      the recursion.  */
   if (gimple_code (stmt) == GIMPLE_PHI)
     {
+      vect_def_type def_type = STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt));
       /* Induction from different IVs is not supported.  */
-      if (STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt)) == vect_induction_def)
-       FOR_EACH_VEC_ELT (stmts, i, stmt)
-         if (stmt != stmts[0])
-           return NULL;
+      if (def_type == vect_induction_def)
+       {
+         FOR_EACH_VEC_ELT (stmts, i, stmt)
+           if (stmt != stmts[0])
+             return NULL;
+       }
+      else
+       {
+         /* Else def types have to match.  */
+         FOR_EACH_VEC_ELT (stmts, i, stmt)
+           {
+             /* But for reduction chains only check on the first stmt.  */
+             if (GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt))
+                 && GROUP_FIRST_ELEMENT (vinfo_for_stmt (stmt)) != stmt)
+               continue;
+             if (STMT_VINFO_DEF_TYPE (vinfo_for_stmt (stmt)) != def_type)
+               return NULL;
+           }
+       }
       node = vect_create_new_slp_node (stmts);
       return node;
     }