xilinx_ise/CRG_SE: reset inversion support

diff --git a/mibuild/xilinx_ise.py b/mibuild/xilinx_ise.py
index 04cc7cb01f204a077d65be7a4d885d2d39b367d7..698d0b04fc01ef24c655d588b832c6cda621d635 100644 (file)
--- a/mibuild/xilinx_ise.py
+++ b/mibuild/xilinx_ise.py
@@ -14,8 +14,8 @@ def _add_period_constraint(platform, clk, period):
 TIMESPEC "TSclk" = PERIOD "GRPclk" """+str(period)+""" ns HIGH 50%;""", clk=clk)
 
 class CRG_SE(SimpleCRG):
-       def __init__(self, platform, clk_name, rst_name, period):
-               SimpleCRG.__init__(self, platform, clk_name, rst_name)
+       def __init__(self, platform, clk_name, rst_name, period, rst_invert=False):
+               SimpleCRG.__init__(self, platform, clk_name, rst_name, rst_invert)
                _add_period_constraint(platform, self.cd.clk, period)
 
 class CRG_DS(CRG):