arm: Fix for ARM's Streamline conversion script

tracked down issue with ARM's version of gem5 using the "cluster" name.
The public/github version of ARM Gem5 does not use the "cluster" naming
mechanism.

Signed-off-by: Dam Sunwoo <dam.sunwoo@arm.com>
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>

diff --git a/util/streamline/atomic_stat_config.ini b/util/streamline/atomic_stat_config.ini
index 1095345ed8b8d5ab5d7a0494d802e4c101215bbf..d055646087a644befe9a4ddd9408ba5c33326522 100644 (file)
--- a/util/streamline/atomic_stat_config.ini
+++ b/util/streamline/atomic_stat_config.ini
@@ -41,8 +41,8 @@
 # E.g.,
 #
 # commit_inst_count =
-#     system.cluster.cpu#.commit.committedInsts
-#     system.cluster.cpu#.commit.commitSquashedInsts
+#     system.cpu#.commit.committedInsts
+#     system.cpu#.commit.commitSquashedInsts
 #
 # will display the inst counts (committed/squashed) as a stacked line chart.
 # Charts will still be configurable in Streamline.
@@ -51,40 +51,40 @@
 # '#' will be automatically replaced with the correct CPU id.
 
 commit_inst_count =
-    system.cluster.cpu#.committedInsts
+    system.cpu#.committedInsts
 
 cycles =
-    system.cluster.cpu#.num_busy_cycles
-    system.cluster.cpu#.num_idle_cycles
+    system.cpu#.num_busy_cycles
+    system.cpu#.num_idle_cycles
 
 register_access =
-    system.cluster.cpu#.num_int_register_reads
-    system.cluster.cpu#.num_int_register_writes
+    system.cpu#.num_int_register_reads
+    system.cpu#.num_int_register_writes
 
 mem_refs =
-    system.cluster.cpu#.num_mem_refs
+    system.cpu#.num_mem_refs
 
 inst_breakdown =
-    system.cluster.cpu#.num_conditional_control_insts
-    system.cluster.cpu#.num_int_insts
-    system.cluster.cpu#.num_fp_insts
-    system.cluster.cpu#.num_load_insts
-    system.cluster.cpu#.num_store_insts
+    system.cpu#.num_conditional_control_insts
+    system.cpu#.num_int_insts
+    system.cpu#.num_fp_insts
+    system.cpu#.num_load_insts
+    system.cpu#.num_store_insts
 
 icache =
-    system.cluster.il1_cache#.overall_hits::total
-    system.cluster.il1_cache#.overall_misses::total
+    system.il1_cache#.overall_hits::total
+    system.il1_cache#.overall_misses::total
 
 dcache =
-    system.cluster.dl1_cache#.overall_hits::total
-    system.cluster.dl1_cache#.overall_misses::total
+    system.dl1_cache#.overall_hits::total
+    system.dl1_cache#.overall_misses::total
 
 [PER_L2_STATS]
 # '#' will be automatically replaced with the correct L2 id.
 
 l2_cache =
-    system.cluster.l2_cache#.overall_hits::total
-    system.cluster.l2_cache#.overall_misses::total
+    system.l2_cache#.overall_hits::total
+    system.l2_cache#.overall_misses::total
 
 [OTHER_STATS]
 # Anything that doesn't belong to CPU or L2 caches

diff --git a/util/streamline/m5stats2streamline.py b/util/streamline/m5stats2streamline.py
index 96b7432f2b723823dbce49103446d4476734a870..c65649e79cabe3dd7a8f8218504289edeb722c77 100755 (executable)
--- a/util/streamline/m5stats2streamline.py
+++ b/util/streamline/m5stats2streamline.py
@@ -142,18 +142,18 @@ def parseConfig(config_file):
         print "ERROR: config file '", config_file, "' not found"
         sys.exit(1)
 
-    if config.has_section("system.cluster.cpu"):
+    if config.has_section("system.cpu"):
         num_cpus = 1
     else:
         num_cpus = 0
-        while config.has_section("system.cluster.cpu" + str(num_cpus)):
+        while config.has_section("system.cpu" + str(num_cpus)):
             num_cpus += 1
 
-    if config.has_section("system.cluster.l2_cache"):
+    if config.has_section("system.l2_cache"):
         num_l2 = 1
     else:
         num_l2 = 0
-        while config.has_section("system.cluster.l2_cache" + str(num_l2)):
+        while config.has_section("system.l2_cache" + str(num_l2)):
             num_l2 += 1
 
     print "Num CPUs:", num_cpus

diff --git a/util/streamline/o3_stat_config.ini b/util/streamline/o3_stat_config.ini
index 914524e7d99f4ea26b535c6707050e8f3c9c7d8b..64036b5dd143e6c7d6ad1ec0d1dc662a5d3f21ec 100644 (file)
--- a/util/streamline/o3_stat_config.ini
+++ b/util/streamline/o3_stat_config.ini
@@ -41,8 +41,8 @@
 # E.g.,
 #
 # commit_inst_count =
-#     system.cluster.cpu#.commit.committedInsts
-#     system.cluster.cpu#.commit.commitSquashedInsts
+#     system.cpu#.commit.committedInsts
+#     system.cpu#.commit.commitSquashedInsts
 #
 # will display the inst counts (committed/squashed) as a stacked line chart.
 # Charts will still be configurable in Streamline.
@@ -51,57 +51,57 @@
 # '#' will be automatically replaced with the correct CPU id.
 
 icache =
-    system.cluster.il1_cache#.overall_hits::total
-    system.cluster.il1_cache#.overall_misses::total
+    system.il1_cache#.overall_hits::total
+    system.il1_cache#.overall_misses::total
 
 dcache =
-    system.cluster.dl1_cache#.overall_hits::total
-    system.cluster.dl1_cache#.overall_misses::total
+    system.dl1_cache#.overall_hits::total
+    system.dl1_cache#.overall_misses::total
 
 commit_inst_count =
-    system.cluster.cpu#.commit.committedInsts
-    system.cluster.cpu#.commit.commitSquashedInsts
+    system.cpu#.commit.committedInsts
+    system.cpu#.commit.commitSquashedInsts
 
 cycles =
-    system.cluster.cpu#.numCycles
-    system.cluster.cpu#.idleCycles
+    system.cpu#.numCycles
+    system.cpu#.idleCycles
 
 branch_mispredict =
-    system.cluster.cpu#.commit.branchMispredicts
+    system.cpu#.commit.branchMispredicts
 itb =
-    system.cluster.cpu#.itb.hits
-    system.cluster.cpu#.itb.misses
+    system.cpu#.itb.hits
+    system.cpu#.itb.misses
 
 dtb =
-    system.cluster.cpu#.dtb.hits
-    system.cluster.cpu#.dtb.misses
+    system.cpu#.dtb.hits
+    system.cpu#.dtb.misses
 
 commit_inst_breakdown =
-    system.cluster.cpu#.commit.loads
-    system.cluster.cpu#.commit.membars
-    system.cluster.cpu#.commit.branches
-    system.cluster.cpu#.commit.fp_insts
-    system.cluster.cpu#.commit.int_insts
+    system.cpu#.commit.loads
+    system.cpu#.commit.membars
+    system.cpu#.commit.branches
+    system.cpu#.commit.fp_insts
+    system.cpu#.commit.int_insts
 
 int_regfile =
-    system.cluster.cpu#.int_regfile_reads
-    system.cluster.cpu#.int_regfile_writes
+    system.cpu#.int_regfile_reads
+    system.cpu#.int_regfile_writes
 
 misc_regfile =
-    system.cluster.cpu#.misc_regfile_reads
-    system.cluster.cpu#.misc_regfile_writes
+    system.cpu#.misc_regfile_reads
+    system.cpu#.misc_regfile_writes
 
 rename_full =
-    system.cluster.cpu#.rename.ROBFullEvents
-    system.cluster.cpu#.rename.IQFullEvents
-    system.cluster.cpu#.rename.LSQFullEvents
+    system.cpu#.rename.ROBFullEvents
+    system.cpu#.rename.IQFullEvents
+    system.cpu#.rename.LSQFullEvents
 
 [PER_L2_STATS]
 # '#' will be automatically replaced with the correct L2 id.
 
 l2_cache =
-    system.cluster.l2_cache#.overall_hits::total
-    system.cluster.l2_cache#.overall_misses::total
+    system.l2_cache#.overall_hits::total
+    system.l2_cache#.overall_misses::total
 
 [OTHER_STATS]
 # Anything that doesn't belong to CPU or L2 caches