ARM: Fix identification of one RAS pop instruction.

The check should be with the op2 field, not with the op1 field.

diff --git a/src/arch/arm/isa/insts/data.isa b/src/arch/arm/isa/insts/data.isa
index 89c0e48c748c36cc86e8e9eb92ff35f837ff1074..97ae7d0c0bac7c17e66cfc57b9c7aea9fe3a956e 100644 (file)
--- a/src/arch/arm/isa/insts/data.isa
+++ b/src/arch/arm/isa/insts/data.isa
@@ -293,7 +293,7 @@ let {{
     buildDataInst("orr", "Dest = resTemp = Op1 | secondOp;")
     buildDataInst("orn", "Dest = resTemp = Op1 | ~secondOp;", aiw = False)
     buildDataInst("mov", "Dest = resTemp = secondOp;", regRegAiw = False,
-                  isRasPop = "op1 == INTREG_LR", isBranch = "dest == INTREG_PC")
+                  isRasPop = "op2 == INTREG_LR", isBranch = "dest == INTREG_PC")
     buildDataInst("bic", "Dest = resTemp = Op1 & ~secondOp;")
     buildDataInst("mvn", "Dest = resTemp = ~secondOp;")
     buildDataInst("movt",

diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa
index efb8e470b5daca2ac56bc410c6d9e8b183703dd9..88e8fecd1f4493f0ad677dc28fa698dbcb3bf4fc 100644 (file)
--- a/src/arch/arm/isa/templates/pred.isa
+++ b/src/arch/arm/isa/templates/pred.isa
@@ -115,11 +115,12 @@ def template DataRegConstructor {{
                 flags[IsUncondControl] = true;
             else
                 flags[IsCondControl] = true;
-        }
 
-        if (%(is_ras_pop)s) {
-            flags[IsReturn] = true;
+            if (%(is_ras_pop)s) {
+                flags[IsReturn] = true;
+            }
         }
+
     }
 }};