r600: set DX10_CLAMP for compute shader too

I really intended to set this for all shader stages by
3835009796166968750ff46cf209f6d4208cda86 but missed it for compute shaders
(because it's in a different source file...).

Reviewed-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
index 6e87539cfe763a261169920a44cefcb9d309a85b..48c4a9ca459b5556bc880242be683944cfb609ca 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -746,8 +746,9 @@ void evergreen_emit_cs_shader(struct r600_context *rctx,
        radeon_compute_set_context_reg_seq(cs, R_0288D0_SQ_PGM_START_LS, 3);
        radeon_emit(cs, va >> 8); /* R_0288D0_SQ_PGM_START_LS */
        radeon_emit(cs,           /* R_0288D4_SQ_PGM_RESOURCES_LS */
-                       S_0288D4_NUM_GPRS(ngpr)
-                       | S_0288D4_STACK_SIZE(nstack));
+                       S_0288D4_NUM_GPRS(ngpr) |
+                       S_0288D4_DX10_CLAMP(1) |
+                       S_0288D4_STACK_SIZE(nstack));
        radeon_emit(cs, 0);     /* R_0288D8_SQ_PGM_RESOURCES_LS_2 */
 
        radeon_emit(cs, PKT3C(PKT3_NOP, 0, 0));