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radeonsi/gfx9: add a scissor bug workaround
author
Marek Olšák
<marek.olsak@amd.com>
Mon, 9 Jan 2017 15:32:12 +0000
(16:32 +0100)
committer
Marek Olšák
<marek.olsak@amd.com>
Thu, 30 Mar 2017 12:44:33 +0000
(14:44 +0200)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c
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diff --git
a/src/gallium/drivers/radeonsi/si_state_draw.c
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 1ff1547efe77bb8fc5716e652874eb01794762c7..8c6e9cd1fac6372f1d08534a5bda4b0220f4e706 100644
(file)
--- a/
src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/
src/gallium/drivers/radeonsi/si_state_draw.c
@@
-1169,6
+1169,12
@@
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
if (!si_upload_vertex_buffer_descriptors(sctx))
return;
+ /* GFX9 scissor bug workaround. There is also a more efficient but
+ * more involved alternative workaround. */
+ if (sctx->b.chip_class == GFX9 &&
+ si_is_atom_dirty(sctx, &sctx->b.scissors.atom))
+ sctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH;
+
/* Flush caches before the first state atom, which does L2 prefetches. */
if (sctx->b.flags)
si_emit_cache_flush(sctx);