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diff --git a/HDL_workflow/HyperRAM.mdwn b/HDL_workflow/HyperRAM.mdwn
index 9e0670b3d7fb0c9bc118cffa08784e2c8aa00d38..f18bc289af9a2dcc31657c1cbfd0dabcef6d33fe 100644 (file)
--- a/HDL_workflow/HyperRAM.mdwn
+++ b/HDL_workflow/HyperRAM.mdwn
@@ -9,6 +9,7 @@
   <https://ftp.libre-soc.org/W956x8MBYA_64Mb_HyperBus_pSRAM_TFBGA24_datasheet_A01-005_20211208.pdf>
 * Winbond Verilog Model for W956A8MBY:
   <https://www.winbond.com/resource-files/W956x8MBY_verilog_p.zip>
+* [[shakti/m_class/HyperRAM]]
 
 ```
 from nmigen.resources.memory import HyperRAMResources