MessageBuffer mandatoryQueue, ordered="false";
- int cache_state_to_int(State state);
int l2_select_low_bit, default="RubySystem::getBlockSizeBits()";
void set_cache_entry(AbstractCacheEntry a);
#include "base/hashmap.hh"
#include "mem/ruby/common/Global.hh"
-#include "mem/ruby/system/MachineID.hh"
#include "mem/ruby/system/NodeID.hh"
const int ADDRESS_WIDTH = 64; // address width in bytes
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/common/NetDest.hh"
NetDest::NetDest()
#include "debug/RubyNetwork.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/protocol/TopologyType.hh"
#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/BasicLink.hh"
#include <algorithm>
#include "debug/RubyNetwork.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
#include "mem/ruby/network/simple/SimpleNetwork.hh"
#include "base/stl_helpers.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/protocol/TopologyType.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/common/NetDest.hh"
#include "base/stl_helpers.hh"
#include "mem/protocol/MessageSizeType.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
#include "mem/ruby/network/simple/SimpleNetwork.hh"
#include "base/cprintf.hh"
#include "debug/RubyNetwork.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/network/simple/Throttle.hh"
#include "mem/ruby/network/Network.hh"
#include "base/stl_helpers.hh"
#include "base/str.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/protocol/RubyRequest.hh"
#include "mem/ruby/network/Network.hh"
#include "mem/ruby/profiler/AddressProfiler.hh"
}
#endif // __MEM_RUBY_SLICC_INTERFACE_ABSTRACTENTRY_HH__
-
+++ /dev/null
-/*
- * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are
- * met: redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer;
- * redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution;
- * neither the name of the copyright holders nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
-#include "mem/ruby/system/CacheMemory.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/NetDest.hh"
-#include "mem/ruby/common/Set.hh"
#include "mem/ruby/system/DirectoryMemory.hh"
#include "mem/ruby/system/MachineID.hh"
#include "mem/ruby/system/NodeID.hh"
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/profiler/AddressProfiler.hh"
#include "mem/ruby/profiler/Profiler.hh"
using namespace std;
-void
-profile_request(int cache_state, Directory_State directory_state,
- GenericRequestType request_type)
-{
- string requestStr = L1Cache_State_to_string(L1Cache_State(cache_state))+
- ":" +
- Directory_State_to_string(directory_state) + ":" +
- GenericRequestType_to_string(request_type);
- g_system_ptr->getProfiler()->profileRequest(requestStr);
-}
-
void
profile_request(const string& L1CacheState, const string& L2CacheState,
const string& directoryState, const string& requestType)
#include <string>
#include "mem/protocol/AccessType.hh"
-#include "mem/protocol/Directory_State.hh"
-#include "mem/protocol/GenericRequestType.hh"
-#include "mem/protocol/L1Cache_State.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/profiler/Profiler.hh"
class Set;
-void profile_request(int cache_state, Directory_State directory_state,
- GenericRequestType request_type);
void profile_outstanding_persistent_request(int outstanding);
void profile_outstanding_request(int outstanding);
void profile_sharing(const Address& addr, AccessType type, NodeID requestor,
#include <cassert>
#include "mem/protocol/AccessType.hh"
-#include "mem/protocol/Directory_State.hh"
#include "mem/protocol/GenericRequestType.hh"
-#include "mem/protocol/L1Cache_State.hh"
#include "mem/protocol/MachineType.hh"
#include "mem/protocol/MessageSizeType.hh"
#include "mem/protocol/PrefetchBit.hh"
}
}
-inline int
-cache_state_to_int(L1Cache_State state)
-{
- return state;
-}
-
inline Time
get_time()
{
Source('AbstractCacheEntry.cc')
Source('RubyRequest.cc')
Source('RubySlicc_Profiler_interface.cc')
-Source('RubySlicc_ComponentMapping.cc')
return *entry;
}
-#if 0
-Directory_Entry&
-DirectoryMemory::lookup(PhysAddress address)
-{
- assert(isPresent(address));
- Index index = address.memoryModuleIndex();
-
- if (index < 0 || index > m_size) {
- WARN_EXPR(address.getAddress());
- WARN_EXPR(index);
- WARN_EXPR(m_size);
- ERROR_MSG("Directory Memory Assertion: accessing memory out of range");
- }
- Directory_Entry* entry = m_entries[index];
-
- // allocate the directory entry on demand.
- if (entry == NULL) {
- entry = new Directory_Entry;
- entry->getDataBlk().assign(m_ram->getBlockPtr(address));
-
- // store entry to the table
- m_entries[index] = entry;
- }
-
- return *entry;
-}
-#endif
-
void
DirectoryMemory::invalidateBlock(PhysAddress address)
{
#include "cpu/testers/rubytest/RubyTester.hh"
#include "debug/MemoryAccess.hh"
#include "debug/ProtocolTrace.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "sim/sim_object.hh"
class AbstractController;
-class AbstractMemory;
class CacheRecorder;
class MemoryVector;
class Network;
void registerNetwork(Network*);
void registerProfiler(Profiler*);
void registerTracer(Tracer*);
- void registerAbstractMemory(AbstractMemory*);
void registerAbstractController(AbstractController*);
private: