rs6000: Fix pr56605.c

After the combine 2-2 changes, this testcase does not have a ZERO_EXTEND
in the intermediate code, but an AND instead.

gcc/testsuite/
	* gcc.target/powerpc/pr56605.c: The generated code can have an AND
	instead of a ZERO_EXTEND.

From-SVN: r263521

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ad2610b91b5e7a9bc6829b89e2eec8a23189c2a0..e46072fa9ab486c50e608ab9f36b0d959ee53932 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-08-13  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       * gcc.target/powerpc/pr56605.c: The generated code can have an AND
+       instead of a ZERO_EXTEND.
+
 2018-08-13  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/71625

diff --git a/gcc/testsuite/gcc.target/powerpc/pr56605.c b/gcc/testsuite/gcc.target/powerpc/pr56605.c
index dc8764040e32a830326de509acd03200059e1533..304d6d689d533f1da23e2ff5ca0193ac339ba4cf 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/pr56605.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr56605.c
@@ -12,5 +12,5 @@ void foo (short* __restrict sb, int* __restrict ia)
     ia[i] = (int) sb[i];
 }
 
-/* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\(zero_extend:DI \\\(reg:SI" 1 "combine" } } */
+/* { dg-final { scan-rtl-dump-times "\\\(compare:CC \\\((?:and|zero_extend):DI \\\(reg:\[SD\]I" 1 "combine" } } */