gallium: add PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
authorMarek Olšák <marek.olsak@amd.com>
Fri, 28 Oct 2016 20:34:20 +0000 (22:34 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 15 Nov 2016 19:23:40 +0000 (20:23 +0100)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
14 files changed:
src/gallium/auxiliary/gallivm/lp_bld_limits.h
src/gallium/auxiliary/tgsi/tgsi_exec.h
src/gallium/docs/source/screen.rst
src/gallium/drivers/freedreno/freedreno_screen.c
src/gallium/drivers/nouveau/nv30/nv30_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/r300/r300_screen.c
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeonsi/si_pipe.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/drivers/vc4/vc4_screen.c
src/gallium/drivers/virgl/virgl_screen.c
src/gallium/include/pipe/p_defines.h

index 32addec97246241fdbeae249e11cd62bb701b152..d0a5afd8cb7e384503051a94f2004bebd9f234db 100644 (file)
@@ -140,6 +140,7 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       return 0;
    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
       return 32;
index 9343d788db7e3546a14cb84cc51b246063a8f3cb..489b7258934e01380fa986d0cc271aff4c922f5d 100644 (file)
@@ -534,6 +534,7 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
       return 1;
    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       return 0;
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       return PIPE_MAX_SHADER_BUFFERS;
index 6ad2becc98a38fa2ebc8095a63d6521fd6832d74..33f233a4cb5ba0f7a86c5fef2eeb95c41745dcb5 100644 (file)
@@ -463,6 +463,10 @@ to be 0.
 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
   program.  It should be a mask of ``pipe_shader_ir`` bits.
 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
+* ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
+  cost than this value should be lowered by the state tracker for better
+  performance. This is a tunable for the GLSL compiler and the behavior is
+  specific to the compiler.
 
 
 .. _pipe_compute_cap:
index 97da0d7c2c459467772b5fd98d71f5080b544c56..4fe9a36fa1ca957d076b6e46df5672b598e47c29 100644 (file)
@@ -499,6 +499,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
                return 32;
        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
                return 0;
        }
        debug_printf("unknown shader param %d\n", param);
index 96708c00f7def98f33ecb78873480b081ec5b1a1..126c2074bb67573c5be7f195c13ddd11db3760a0 100644 (file)
@@ -300,6 +300,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
          return 0;
       default:
          debug_printf("unknown vertex shader param %d\n", param);
@@ -348,6 +349,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
          return 0;
       default:
          debug_printf("unknown fragment shader param %d\n", param);
index 50cdeda7ed2a89615840e944b755264005c9afbc..4cf4d2ad933aeefff497aed45c72921fa14e2a3d 100644 (file)
@@ -345,6 +345,7 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
    case PIPE_SHADER_CAP_SUPPORTED_IRS:
    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       return 0;
    default:
       NOUVEAU_ERR("unknown PIPE_SHADER_CAP %d\n", param);
index 6361e9e4903da84f215764f0c39068f387dd6106..68e3ab6851f591027b30b390b97de16ae37cd39e 100644 (file)
@@ -374,6 +374,7 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
       return 1;
    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
+   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       return 0;
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       return NVC0_MAX_BUFFERS;
index 1e1dc87a6a7d788947fb8ed5e1af944e22f30cfd..13fe7afd5e076f0f1f1de555dec9bc66786b1fca 100644 (file)
@@ -339,6 +339,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+        case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
             return 0;
         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
             return 32;
@@ -401,6 +402,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+        case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
             return 0;
         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
             return 32;
index 970a20e7b3ac5d2c0caacbed9538d21d6442a8f7..adcb694f6d01dc79dbe19c444d68219dce4caa1e 100644 (file)
@@ -561,6 +561,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
        case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
        case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
                return 0;
        case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
                /* due to a bug in the shader compiler, some loops hang
index f0cd9cae4823f1158d562de6522eb02bdabe99f7..146128dbc3c4ffefea519e69633a1b127c451f79 100644 (file)
@@ -659,6 +659,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
        case PIPE_SHADER_CAP_SUPPORTED_IRS:
        case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
        case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
                return 0;
        }
        return 0;
index 67a35cfee1214f9b7766007315f4bfd626343898..677e6bf6a25a3882934bb4b06f97630084e01c96 100644 (file)
@@ -499,6 +499,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
          return 0;
       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
          return 32;
@@ -561,6 +562,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
       case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
          return 0;
       case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
          return 32;
@@ -656,6 +658,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
    case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+   case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       return 0;
    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
       return 32;
index 9aa80cab873f52b60c58b1c1759fcf55cdab4d86..82b50775cb42446d73eb7d7626c689bbebb16058 100644 (file)
@@ -402,6 +402,7 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
                return 32;
         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
+       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
                 return 0;
         default:
                 fprintf(stderr, "unknown shader param %d\n", param);
index 2817809d71cddf8b79bdfed49ca2ecd6f04b6d1a..3d71d7dc93553f99f1904e49b90f7204e0af488f 100644 (file)
@@ -312,6 +312,7 @@ virgl_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sh
          return 32;
       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
          return 4096 * sizeof(float[4]);
+      case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
       default:
          return 0;
       }
index 69d290cdcc7f74a881766685d37b37128ac59eea..6dd299e2120a41377e908ff71cba2bc6bd97ad0a 100644 (file)
@@ -809,6 +809,7 @@ enum pipe_shader_cap
    PIPE_SHADER_CAP_MAX_SHADER_BUFFERS,
    PIPE_SHADER_CAP_SUPPORTED_IRS,
    PIPE_SHADER_CAP_MAX_SHADER_IMAGES,
+   PIPE_SHADER_CAP_LOWER_IF_THRESHOLD,
 };
 
 /**