alpha.md: Follow spelling conventions.

	* config/alpha/alpha.md: Follow spelling conventions.
	* config/arm/arm.c: Likewise.
	* config/arm/arm.h: Likewise.
	* config/arm/arm.md: Likewise.
	* config/arm/crtn.asm: Likewise.
	* config/m32r/m32r.c: Likewise.
	* config/m32r/m32r.md: Likewise.
	* config/rs6000/rs6000.c: Likewise.

From-SVN: r67970

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e7448cd424e9f491b914acf67a599b39f72a882c..8bd85fa99d63770574f2e16a4e1d8e3b5ebed083 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2003-06-15  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/alpha/alpha.md: Follow spelling conventions.
+       * config/arm/arm.c: Likewise.
+       * config/arm/arm.h: Likewise.
+       * config/arm/arm.md: Likewise.
+       * config/arm/crtn.asm: Likewise.
+       * config/m32r/m32r.c: Likewise.
+       * config/m32r/m32r.md: Likewise.
+       * config/rs6000/rs6000.c: Likewise.
+
 2003-06-15  Richard Henderson  <rth@redhat.com>
 
        * config/alpha/alpha.c (alpha_output_mi_thunk_osf): Call

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index 8ae7aca27472d777e15720256417f0746c4a0e39..9ddeb9e7df1539d79e7adbffe140689266e4b96f 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -5273,7 +5273,7 @@ fadd,fmul,fcpys,fdiv,fsqrt,misc,mvi,ftoi,itof,multi,none"
 
 ;; Split the load of an address into a four-insn sequence on Unicos/Mk.
 ;; Always generate a REG_EQUAL note for the last instruction to facilitate
-;; optimisations. If the symbolic operand is a label_ref, generate REG_LABEL
+;; optimizations. If the symbolic operand is a label_ref, generate REG_LABEL
 ;; notes and update LABEL_NUSES because this is not done automatically.
 ;; Labels may be incorrectly deleted if we don't do this.
 ;;

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 4a42f0b998e38611258da66924c0fec35a01dcc8..cd2b149ea3fb8f02464eb832760f88674f56b175 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -5642,7 +5642,7 @@ arm_reload_in_hi (rtx *operands)
                                                         0))));
 }
 
-/* Handle storing a half-word to memory during reload by synthesising as two
+/* Handle storing a half-word to memory during reload by synthesizing as two
    byte stores.  Take care not to clobber the input values until after we
    have moved them somewhere safe.  This code assumes that if the DImode
    scratch in operands[2] overlaps either the input value or output address
@@ -7740,7 +7740,7 @@ arm_compute_save_reg_mask (void)
      it.  If we are pushing other registers onto the stack however, we
      can save an instruction in the epilogue by pushing the link register
      now and then popping it back into the PC.  This incurs extra memory
-     accesses though, so we only do it when optimising for size, and only
+     accesses though, so we only do it when optimizing for size, and only
      if we know that we will not need a fancy return sequence.  */
   if (regs_ever_live [LR_REGNUM]
          || (save_reg_mask

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 65e816608d90cdabb0e26a43c8a5fc3677c5d39e..c923e01f2c8e3eb846fb5cff08629f37f390ce24 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2345,7 +2345,7 @@ extern int making_const_table;
 #endif
 \f
 /* Only perform branch elimination (by making instructions conditional) if
-   we're optimising.  Otherwise it's of no use anyway.  */
+   we're optimizing.  Otherwise it's of no use anyway.  */
 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)     \
   if (TARGET_ARM && optimize)                          \
     arm_final_prescan_insn (INSN);                     \

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 2d231c1c045319c7121f76ae91924f45355f9e6c..d03c193aba9c7c1df0858d56dfc7e8508be7c02d 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -509,7 +509,7 @@
   "
 )
 
-; If there is a scratch available, this will be faster than synthesising the
+; If there is a scratch available, this will be faster than synthesizing the
 ; addition.
 (define_peephole2
   [(match_scratch:SI 3 "r")

diff --git a/gcc/config/arm/crtn.asm b/gcc/config/arm/crtn.asm
index 2f4b5422eb240cc5bd22c50c5e85272c18e5ba53..9ad75e3f2aabb9ca122d8569cb59a7cfee694098 100644 (file)
--- a/gcc/config/arm/crtn.asm
+++ b/gcc/config/arm/crtn.asm
@@ -39,7 +39,7 @@
        # in crti.asm.  If you change this macro you must also change
        # that macro match.
        #
-       # Note - we do not try any fancy optimisations of the return
+       # Note - we do not try any fancy optimizations of the return
        # sequences here, it is just not worth it.  Instead keep things
        # simple.  Restore all the save resgisters, including the link
        # register and then perform the correct function return instruction.

diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c
index 8d42306b1f8cdbad16784825aeee9875ebb790ff..55b7cf71d80b9c6295c7d690ecb338b2d3aad807 100644 (file)
--- a/gcc/config/m32r/m32r.c
+++ b/gcc/config/m32r/m32r.c
@@ -1002,7 +1002,7 @@ large_insn_p (op, mode)
   return get_attr_length (op) != 2;
 }
 
-/* Return non-zero if TYPE must be passed or returned in memory.
+/* Return nonzero if TYPE must be passed or returned in memory.
    The m32r treats both directions the same so we handle both directions
    in this function.  */
 

diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md
index e4febd77fdd64ef22a9f12114974247013ea80d2..7dad4e0f8f585285211503c52edbc70dae90adfb 100644 (file)
--- a/gcc/config/m32r/m32r.md
+++ b/gcc/config/m32r/m32r.md
@@ -2540,7 +2540,7 @@
 ;; Simialr code is produced for the subtract expression.  With this
 ;; peephole the redundant move is eliminated.
 ;;
-;; This optimisation only works if PRESERVE_DEATH_INFO_REGNO_P is
+;; This optimization only works if PRESERVE_DEATH_INFO_REGNO_P is
 ;; defined in m32r.h
 
 (define_peephole

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d3d92fad58363f2c1bfd3c54656a83375e464111..8bd2a0cb78bc849d6b1777f9f0df00f00c282b7e 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -1534,7 +1534,7 @@ easy_fp_constant (op, mode)
     abort ();
 }
 
-/* Return non zero if all elements of a vector have the same value.  */
+/* Return nonzero if all elements of a vector have the same value.  */
 
 static int
 easy_vector_same (op, mode)