i965/fs: Apply source modifier workarounds to POW as well.

Single-operand math already had these workarounds, but POW (the only two
operand function) did not.  It needs them too - otherwise we can hit
assertion failures in brw_eu_emit.c when code is actually generated.

NOTE: This is a candidate for the 7.10 branch.

Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 8fd120cb6536f0efc0b7da749d77de3df2b98f18..66bbdbe80e673da3fd3311d47498a153e19acb6a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -661,14 +661,18 @@ fs_visitor::emit_math(fs_opcodes opcode, fs_reg dst, fs_reg src0, fs_reg src1)
    assert(opcode == FS_OPCODE_POW);
 
    if (intel->gen >= 6) {
-      /* Can't do hstride == 0 args to gen6 math, so expand it out. */
-      if (src0.file == UNIFORM) {
+      /* Can't do hstride == 0 args to gen6 math, so expand it out.
+       *
+       * The hardware ignores source modifiers (negate and abs) on math
+       * instructions, so we also move to a temp to set those up.
+       */
+      if (src0.file == UNIFORM || src0.abs || src0.negate) {
         fs_reg expanded = fs_reg(this, glsl_type::float_type);
         emit(fs_inst(BRW_OPCODE_MOV, expanded, src0));
         src0 = expanded;
       }
 
-      if (src1.file == UNIFORM) {
+      if (src1.file == UNIFORM || src1.abs || src1.negate) {
         fs_reg expanded = fs_reg(this, glsl_type::float_type);
         emit(fs_inst(BRW_OPCODE_MOV, expanded, src1));
         src1 = expanded;