arch-riscv: initialize RISC-V's thread pointer register in clone syscall

This patch initializes thread pointer register to Thread Local Storage
(TLS)'s pointer given to a clone system call.

Change-Id: I03e2cf4763e6a0ed31f357772a513a05e1e3461b
Reviewed-on: https://gem5-review.googlesource.com/c/9622
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Brandon Potter <Brandon.Potter@amd.com>

diff --git a/src/arch/riscv/linux/linux.hh b/src/arch/riscv/linux/linux.hh
index 23b4fd562e315058c9552b0a30a9533578a0203e..441550a506656ec06c44480b6a601c388fd9d1b7 100644 (file)
--- a/src/arch/riscv/linux/linux.hh
+++ b/src/arch/riscv/linux/linux.hh
@@ -196,6 +196,8 @@ class RiscvLinux64 : public Linux
               uint64_t stack, uint64_t tls)
     {
         RiscvISA::copyRegs(ptc, ctc);
+        if (flags & TGT_CLONE_SETTLS)
+            ctc->setIntReg(RiscvISA::ThreadPointerReg, tls);
         if (stack)
             ctc->setIntReg(RiscvISA::StackPointerReg, stack);
     }