i965: Introduce a brw_vue_prog_data::include_vue_handles flag.

Tessellation shaders and SIMD8 geometry shaders may need to resort to
the pull model for inputs at times.  When set, the state upload code
will tell the hardware to provide URB handles for input data.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.h b/src/mesa/drivers/dri/i965/brw_compiler.h
index 10e1fde73f686e98b0ce35ecfd58f246ae5d0323..6a9799e578eb8442205f92514de370325b87c47d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_compiler.h
+++ b/src/mesa/drivers/dri/i965/brw_compiler.h
@@ -485,6 +485,9 @@ struct brw_vue_prog_data {
    struct brw_stage_prog_data base;
    struct brw_vue_map vue_map;
 
+   /** Should the hardware deliver input VUE handles for URB pull loads? */
+   bool include_vue_handles;
+
    GLuint urb_read_length;
    GLuint total_grf;
 

diff --git a/src/mesa/drivers/dri/i965/gen8_gs_state.c b/src/mesa/drivers/dri/i965/gen8_gs_state.c
index d766ca7bebf6269aa649e2e7683e0e6cdd1929a2..6738e85eabaa6eae6a7f52c758be0e24e15a6d75 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_gs_state.c
@@ -68,6 +68,8 @@ gen8_upload_gs_state(struct brw_context *brw)
                  GEN7_GS_OUTPUT_VERTEX_SIZE_SHIFT) |
                 (brw->gs.prog_data->output_topology <<
                  GEN7_GS_OUTPUT_TOPOLOGY_SHIFT) |
+                (prog_data->include_vue_handles ?
+                 GEN7_GS_INCLUDE_VERTEX_HANDLES : 0) |
                 (prog_data->urb_read_length <<
                  GEN6_GS_URB_READ_LENGTH_SHIFT) |
                 (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT) |