radeonsi: separate out load sample position
authorDave Airlie <airlied@redhat.com>
Thu, 16 Jul 2015 03:38:41 +0000 (04:38 +0100)
committerDave Airlie <airlied@redhat.com>
Sat, 25 Jul 2015 00:06:41 +0000 (01:06 +0100)
This is prep work for reusing this in the interpolation
code later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/gallium/drivers/radeonsi/si_shader.c

index cddd9a0e12053c4ff64c981e09969c5146e52b67..77ba9c9e0a12ff2bfd2683e1856e885559c57158 100644 (file)
@@ -1030,6 +1030,31 @@ static LLVMValueRef buffer_load_const(LLVMBuilderRef builder, LLVMValueRef resou
                               LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
 }
 
+static LLVMValueRef load_sample_position(struct radeon_llvm_context *radeon_bld, LLVMValueRef sample_id)
+{
+       struct si_shader_context *si_shader_ctx =
+               si_shader_context(&radeon_bld->soa.bld_base);
+       struct lp_build_context *uint_bld = &radeon_bld->soa.bld_base.uint_bld;
+       struct gallivm_state *gallivm = &radeon_bld->gallivm;
+       LLVMBuilderRef builder = gallivm->builder;
+       LLVMValueRef desc = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST);
+       LLVMValueRef buf_index = lp_build_const_int32(gallivm, SI_DRIVER_STATE_CONST_BUF);
+       LLVMValueRef resource = build_indexed_load_const(si_shader_ctx, desc, buf_index);
+
+       /* offset = sample_id * 8  (8 = 2 floats containing samplepos.xy) */
+       LLVMValueRef offset0 = lp_build_mul_imm(uint_bld, sample_id, 8);
+       LLVMValueRef offset1 = LLVMBuildAdd(builder, offset0, lp_build_const_int32(gallivm, 4), "");
+
+       LLVMValueRef pos[4] = {
+               buffer_load_const(builder, resource, offset0, radeon_bld->soa.bld_base.base.elem_type),
+               buffer_load_const(builder, resource, offset1, radeon_bld->soa.bld_base.base.elem_type),
+               lp_build_const_float(gallivm, 0),
+               lp_build_const_float(gallivm, 0)
+       };
+
+       return lp_build_gather_values(gallivm, pos, 4);
+}
+
 static void declare_system_value(
        struct radeon_llvm_context * radeon_bld,
        unsigned index,
@@ -1081,25 +1106,8 @@ static void declare_system_value(
                break;
 
        case TGSI_SEMANTIC_SAMPLEPOS:
-       {
-               LLVMBuilderRef builder = gallivm->builder;
-               LLVMValueRef desc = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST);
-               LLVMValueRef buf_index = lp_build_const_int32(gallivm, SI_DRIVER_STATE_CONST_BUF);
-               LLVMValueRef resource = build_indexed_load_const(si_shader_ctx, desc, buf_index);
-
-               /* offset = sample_id * 8  (8 = 2 floats containing samplepos.xy) */
-               LLVMValueRef offset0 = lp_build_mul_imm(uint_bld, get_sample_id(radeon_bld), 8);
-               LLVMValueRef offset1 = LLVMBuildAdd(builder, offset0, lp_build_const_int32(gallivm, 4), "");
-
-               LLVMValueRef pos[4] = {
-                       buffer_load_const(builder, resource, offset0, radeon_bld->soa.bld_base.base.elem_type),
-                       buffer_load_const(builder, resource, offset1, radeon_bld->soa.bld_base.base.elem_type),
-                       lp_build_const_float(gallivm, 0),
-                       lp_build_const_float(gallivm, 0)
-               };
-               value = lp_build_gather_values(gallivm, pos, 4);
+               value = load_sample_position(radeon_bld, get_sample_id(radeon_bld));
                break;
-       }
 
        case TGSI_SEMANTIC_SAMPLEMASK:
                /* Smoothing isn't MSAA in GL, but it's MSAA in hardware.